DEIC420 20 Ampere Low-Side Ultrafast RF MOSFET Driver Description Features TheDEIC420 is a CMOS high speed high current gate • Built using the advantages and compatibility driver specifically designed to drive MOSFETs in Class D TM of CMOS and IXYS HDMOS processes and E HF RF applications at up to 45MHz, as well as • Latch-Up Protected other applications requiring ultrafast rise and fall times or • High Peak Output Current: 20A Peak short minimum pulse widths. The DEIC420 can source • Wide Operating Range: 8V to 30V and sink 20A of peak current while producing voltage rise • Rise And Fall Times of <4ns and fall times of less than 4ns, and minimum pulse • Minimum Pulse Width Of 8ns widths of 8ns. The input of the driver is compatible with • High Capacitive Load TTL or CMOS and is fully immune to latch up over the Drive Capability: 4nF in <4ns entire operating range. Designed with small internal • Matched Rise And Fall Times delays, cross conduction/current shoot-through is • 32ns Input To Output Delay Time virtually eliminated in the DEIC420. Its features and wide • Low Output Impedance safety margin in operating voltage and power make the • Low Quiescent Supply Currentt DEIC420 unmatched in performance and value. The DEIC420 is packaged in DEI's low inductance RF (1) package incorporating DEI's patented RF layout Applications techniques to minimize stray lead inductances for • Driving RF MOSFETs optimum switching performance. For applications that do • Class D or E Switching Amplifier Drivers not require the power dissipation of the DEIC420, the • Multi MHz Switch Mode Power Supplies (SMPS) driver is also available in a 28 pin SOIC package. See • Pulse Generators the IXDD415SI data sheet for additional information. The • Acoustic Transducer Drivers DEIC420 is a surface-mount device, and incorporates • Pulsed Laser Diode Drivers patented RF layout techniques to minimize stray lead • DC to DC Converters inductances for optimum switching performance. • Pulse Transformer Driver (1) DEI U.S. Patent #4,891,686 Figure 1 - DEIC420 Functional Diagram Copyright © DIRECTED ENERGY, INC. 2001, 2002 First Release DEIC420 Absolute Maximum Ratings Parameter Value Parameter Value Supply Voltage 30V Maximum Junction Temperature o 150 C All Other Pins -0.3V to V + 0.3V CC o o Operating Temperature Range -40 C to 85 C Power Dissipation Thermal Impedance (Junction To Case) o 2W T ≤25 C AMBIENT o θ JC 0.13 C/W o 100W T ≤25 C CASE Storage Temperature o o -65 C to 150 C Soldering Lead Temperature o 300 C (10 seconds maximum) Electrical Characteristics o Unless otherwise noted, T = 25 C, 8V ≤ V ≤ 30V . A CC All voltage measurements with respect to DGND. DEIC420 configured as described in Test Conditions. Symbol Parameter Test Conditions Min Typ Max Units V High input voltage 3.5 V IH V Low input voltage 0.8 V IL V Input voltage range -5 V + 0.3 V IN CC I Input current 0V V V -10 10 A IN ≤ ≤ µ IN CC V High output voltage V - .025 V OH CC V Low output voltage 0.025 V OL R Output resistance I = 10mA, V = 15V 0.4 0.6 OH OUT CC Ω @ Output high R Output resistance I = 10mA, V = 15V 0.4 0.6 OL OUT CC Ω @ Output Low I Peak output current V = 15V 20 A PEAK CC I Continuous output 4 A DC current f Maximum frequency C =4nF Vcc=15V 45 MHz MAX L (1) t Rise time C =1nF Vcc=15V V =2V to 12V 3 ns R L OH C =4nF Vcc=15V V =2V to 12V 4 ns L OH (1) t Fall time C =1nF Vcc=15V V =12V to 2V 3 ns F L OH C =4nF Vcc=15V V =12V to 2V 3.5 ns L OH t On-time propagation C =4nF Vcc=15V 32 38 ns ONDLY L (1) delay t Off-time propagation C =4nF Vcc=15V 29 35 ns OFFDLY L (1) delay P Minimum pulse width FWHM C =1nF Vcc=15V 8 ns Wmin L +3V to +3V C =1nF Vcc=15V 9 ns L V Power supply voltage 8 15 30 V CC I Power supply current V = 3.5V 1 3 mA CC IN V = 0V 0 10 IN µA V = + V 10 IN CC µA (1) Refer to Figures 3a and 3b Specifications Subject To Change Without Notice 2 DEIC420 Lead Description - DEIC420 SYMBOL FUNCTION DESCRIPTION Positive power-supply voltage input. These leads provide power to VCC Supply Voltage the entire chip. The range for this voltage is from 8V to 30V. IN Input Input signal-TTL or CMOS compatible. Driver Output. For application purposes, this lead is connected, OUT Output directly to the Gate of a MOSFET The system ground leads. Internally connected to all circuitry, these leads provide ground reference for the entire chip. These leads GND Power Ground should be connected to a low noise analog ground plane for optimum performance. Note 1: Operating the device beyond parameters with listed “absolute maximum ratings” may cause permanent damage to the device. Typical values indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. The guaranteed specifications apply only for the test conditions listed. Exposure to absolute maximum rated conditions for extended periods may affect device reliability. CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD procedures when handling and assembling this component. Figure 2 - DEIC420 Package Photo And Outline Figure 3a - Characteristics Test Diagram Figure 3b - Timing Diagram 5V 90% INPUT2.5V 10% 0V PWMIN tOFFDLY tONDLY tR tF VIN Vcc 90% OUTPUT 10% 0V 3 DEIC420 Typical Performance Characteristics Fig. 4 Fall Time vs. Load Capacitance Rise Time vs. Load Capacitance Fig. 5 V = 15V, V = 12V To 2V V = 15V, V = 2V To 12V CC OH CC OH 5 5 4 4 3 3 2 2 1 1 0 0 0 1k 2k 3k 4k 0 1k 2k 3k 4k Load Capacitance (pF) Load Capacitance (pF) Fig. 6 Supply Current vs. Frequency Fig. 7 Supply Current vs. Load Capacitance Vcc=15V Vcc=15V 6 10 4 nF 5 40 MHz 2 nF 30 MHz 1 nF 4 C = 0 L 20 MHz 3 1 10 MHz 2 5 MHz 1 1 MHz 0 0.1 10 20 30 40 0k 1k 2k 3k 4k Frequency (MHz) Load Capacitance (pF) Fig. 9 Propagation Delay Times vs. Junction Temperature Propagation Delay Times vs. Input Voltage Fig. 8 C = 4nF, V = 15V C =4nF V =15V L CC L CC 50 50 45 t ONDLY t ONDLY 40 40 t OFFDLY 35 30 t OFFDLY 30 20 25 20 10 15 0 10 24 68 10 12 -40 -20 0 20 406080 100 120 Input Voltage (V) Temperature (°C) 4 Rise Time (ns) Propagation Delay (ns) Supply Current (A) Fall Time (ns) Time (ns) Supply Current (A) DEIC420 Fig. 10 Propagation Delay vs. Supply Voltage C =4nF V =5V@ 100kH z L IN 50 40 t ON D L Y 30 t OF F D L Y 20 10 0 8 10 12141618 Supply Voltage (V) Typical Output Waveforms Unless otherwise noted, all waveforms are taken driving a 1nF load, 1MHz repetition frequency, V =15V, Case Temperature = 25°C CC Figure 11 3ns Rise Time Figure 12 3ns Fall Time Figure 14 1MHz CW Repetition Frequency Figure 13 <8ns Minimum Pulse Width 5 Propagation Delay (ns) DEIC420 Figure 15 13.56MHz CW Repetition Frequency Figure 16 50MHz Burst Repetition Frequency Figure 17 - High Frequency Gate Drive Circuit 6 DEIC420 APPLICATIONS INFORMATION High Frequency Gate Drive Circuit the DEIC420 and whatever logic is driving it. All three of The circuit diagram in figure 17 is a circuit diagram for a these paths should be as low in resistance and very high switching speed, high frequency gate driver inductance as possible, and thus as short as practical. circuit using the DEIC420. This is the circuit used in the EVIC420 Evaluation Board,and is capable of driving a Output Lead Inductance MOSFET at up to the maximum operating limits of the Of equal importance to supply bypassing and grounding DEIC420. The circuit's very high switching speed and are issues related to the output lead inductance. Every high frequency operation dictates the close attention to effort should be made to keep the leads between the several important issues with respect to circuit design. driver and its load as short and wide as possible, and The three key elements are circuit loop inductance, Vcc treated as coplanar transmission lines. bypassing and grounding. In configurations where the optimum configuration of Circuit Loop Inductance circuit layout and bypassing cannot be used, a series Referring to Figure 17, the Vcc to Vcc ground current resistance of a few Ohms in the gate lead may be path defines the loop which will generate the inductive necessary to prevent ringing. term. This loop must be kept as short as possible. The Heat Sinking output lead must be no further than 0.375 inches (9.5mm) from the gate of the MOSFET. Furthermore the For high power operation, the bottom side metalized output ground leads must provide a balanced symmetric substrate should be placed in compression against an coplanar ground return for optimum operation. appropriate heat sink. The substrate is metalized for improved heat dissipation, and is not electrically Vcc Bypassing connected to the device or to ground. In order for the circuit to turn the MOSFET on properly, the DEIC420 must be able to draw up to 20A of current See the DEI technical note "DE-Series MOSFET and IC from the Vcc power supply in 2-6ns (depending upon the Mounting Instructions" on the DEI web site at input capacitance of the MOSFET being driven). This www.directedenergy.com/apptech.htm for detailed means that there must be very low impedance between mounting instructions. The package dimensions of the the driver and the power supply. The most common DEIC420 are identical to those of the DE-275 MOSFET. method of achieving this low impedance is to bypass the power supply at the driver with a capacitance value that is at least two orders of magnitude larger than the load capacitance. Usually, this is achieved by placing two or three different types of bypassing capacitors, with complementary impedance curves, very close to the driver itself. (These capacitors should be carefully selected, low inductance, low resistance, high-pulse current-service capacitors). Care should be taken to keep the lengths of the leads between these bypass capacitors and the DEIC420 to an absolute minimum. The bypassing should be comprised of several values of chip capacitors symmetrically placed on ether side of the IC. Recommended values are .01uF, .47uF chips and at least two 4.7uF tantalums. Grounding In order for the design to turn the load off properly, the DEIC420 must be able to drain this 20A of current into Directed Energy, Inc. an adequate grounding system. There are three paths for An IXYS Company returning current that need to be considered: Path #1 is 2401 Research Blvd. Ste. 108, Ft. Collins, CO 80526 between the DEIC420 and its load. Path #2 is between Tel: 970-493-1901; Fax: 970-493-1903 the DEIC420 and its power supply. Path #3 is between e-mail: deiinfo@directedenergy.com www.directedenergy.com Doc #9200-0230 Rev 3 7