HIN202E, HIN206E, HIN207E, HIN208E, ® HIN211E, HIN213E, HIN232E Data Sheet November 4, 2005 FN4315.16 ±15kV, ESD-Protected, +5V Powered, Features RS-232 Transmitters/Receivers • Pb-Free Plus Anneal Available (RoHS Compliant) The HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, • High Speed ISDN Compatible . . . . . . . . . . . . . 230kbits/s HIN213E, HIN232E family of RS-232 transmitters/receivers • ESD Protection for RS-232 I/O Pins to ±15kV (IEC61000) interface circuits meet all ElA high-speed RS-232E and V.28 specifications, and are particularly suited for those • Meets All RS-232E and V.28 Specifications applications where ±12V is not available. A redesigned • Requires Only 0.1µF or Greater External Capacitors transmitter circuit improves data rate and slew rate, which makes this suitable for ISDN and high speed modems. The • Two Receivers Active in Shutdown Mode (HIN213E) transmitter outputs and receiver inputs are protected to • Requires Only Single +5V Power Supply ±15kV ESD (Electrostatic Discharge). They require a single +5V power supply and feature onboard charge pump voltage • Onboard Voltage Doubler/Inverter converters which generate +10V and -10V supplies from the • Low Power Consumption (Typ) . . . . . . . . . . . . . . . . . 5mA 5V supply. The family of devices offers a wide variety of • Low Power Shutdown Function (Typ) . . . . . . . . . . . . .1µA high-speed RS-232 transmitter/receiver combinations to accommodate various applications (see Selection Table). • Three-State TTL/CMOS Receiver Outputs The HIN206E, HIN211E and HIN213E feature a low power • Multiple Drivers shutdown mode to conserve energy in battery powered - ±10V Output Swing for +5V Input applications. In addition, the HIN213E provides two active -300Ω Power-Off Source Impedance receivers in shutdown mode allowing for easy “wakeup” - Output Current Limiting capability. - TTL/CMOS Compatible The drivers feature true TTL/CMOS input compatibility, slew • Multiple Receivers rate-limited output, and 300Ω power-off source impedance. - ±30V Input Voltage Range The receivers can handle up to ±30V input, and have a 3kΩ -3kΩ to 7kΩ Input Impedance to 7kΩ input impedance. The receivers also feature - 0.5V Hysteresis to Improve Noise Rejection hysteresis to greatly improve noise rejection. Applications • Any System Requiring High-Speed RS-232 Communications Port - Computer - Portable, Mainframe, Laptop - Peripheral - Printers and Terminals - Instrumentation, UPS - Modems, ISDN Terminal Adaptors Selection Table NUMBER OF NUMBER OF NUMBER OF NUMBER OF 0.1µF LOW POWER RECEIVERS PART POWER SUPPLY RS-232 RS-232 EXTERNAL SHUTDOWN/TTL ACTIVE IN NUMBER VOLTAGE DRIVERS RECEIVERS CAPACITORS THREE-STATE SHUTDOWN HIN202E +5V 2 2 4 Capacitors No/No 0 HIN206E +5V 4 3 4 Capacitors Yes/Yes 0 HIN207E +5V 5 3 4 Capacitors No/No 0 HIN208E +5V 4 4 4 Capacitors No/No 0 HIN211E +5V 4 5 4 Capacitors Yes/Yes 0 HIN213E +5V 4 5 4 Capacitors Yes/Yes 2 HIN232E +5V 2 2 4 Capacitors No/No 0 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Ordering Information Ordering Information (Continued) TEMP. TEMP. PART RANGE PKG. PART RANGE PKG. PART NO. MARKING (°C) PACKAGE DWG. # PART NO. MARKING (°C) PACKAGE DWG. # HIN202ECB HIN202ECB 0 to 70 16 Ld SOIC (W) M16.3 HIN206EIAZA-T HIN206EIAZ 24 Ld SSOP Tape and M24.209 (Note) Reel (Pb-free) HIN202ECB-T HIN202ECB 16 Ld SOIC (W) Tape and M16.3 Reel HIN207ECA-T HIN207ECA 24 Ld SSOP Tape and M24.209 Reel HIN202ECBZ 202ECBZ 0 to 70 16 Ld SOIC (W) M16.3 (Note) (Pb-free) HIN207ECAZ HIN207ECAZ 0 to 70 24 Ld SSOP M24.209 (Note) (Pb-free) HIN202ECBZ-T 202ECBZ 16 Ld SOIC (W) Tape and M16.3 (Note) Reel (Pb-free) HIN207ECAZ-T HIN207ECAZ 24 Ld SSOP Tape and M24.209 (Note) Reel (Pb-free) HIN202ECBN HIN202ECBN 0 to 70 16 Ld SOIC (N) M16.15 HIN207ECB HIN207ECB 0 to 70 24 Ld SOIC M24.3 HIN202ECBN-T HIN202ECBN 16 Ld SOIC (N) Tape and M16.15 Reel HIN207ECB-T HIN207ECB 24 Ld SOIC Tape and M24.3 Reel HIN202ECBNZ 202ECBNZ 0 to 70 16 Ld SOIC (N) M16.15 (Note) (Pb-free) HIN207ECBZ HIN207ECBZ 0 to 70 24 Ld SOIC M24.3 (Note) (Pb-free) HIN202ECBNZ-T 202ECBNZ 16 Ld SOIC (N) Tape and M16.15 (Note) Reel (Pb-free) HIN207ECBZ-T HIN207ECBZ 24 Ld SOIC Tape and M24.3 (Note) Reel (Pb-free) HIN202ECP HIN202ECP 0 to 70 16 Ld PDIP E16.3 HIN207EIA HIN207EIA -40 to 85 24 Ld SSOP M24.209 HIN202ECPZ 202ECPZ 0 to 70 16 Ld PDIP* E16.3 (Note) (Pb-free) HIN207EIAZ HIN207EIAZ -40 to 85 24 Ld SSOP M24.209 (Note) (Pb-free) HIN202EIB HIN202EIB -40 to 85 16 Ld SOIC (W) M16.3 HIN207EIAZ-T HIN207EIAZ 24 Ld SSOP Tape and M24.209 HIN202EIB-T HIN202EIB 16 Ld SOIC (W) Tape and M16.3 (Note) Reel (Pb-free) Reel HIN207EIB HIN207EIB -40 to 85 24 Ld SOIC M24.3 HIN202EIBZ 202EIBZ -40 to 85 16 Ld SOIC (W) M16.3 (Note) (Pb-free) HIN207EIB-T HIN207EIB 24 Ld SOIC Tape and M24.3 Reel HIN202EIBZ-T 202EIBZ 16 Ld SOIC (W) Tape and M16.3 (Note) Reel (Pb-free) HIN207EIBZ HIN207EIBZ -40 to 85 24 Ld SOIC M24.3 (Note) (Pb-free) HIN202EIBN HIN202EIBN -40 to 85 16 Ld SOIC (N) M16.15 HIN207EIBZ-T HIN207EIBZ 24 Ld SOIC Tape and M24.3 HIN202EIBN-T HIN202EIBN 16 Ld SOIC (N) Tape and M16.15 (Note) Reel (Pb-free) Reel HIN208ECA HIN208ECA 0 to 70 24 Ld SSOP M24.209 HIN202EIBNZ 202EIBNZ -40 to 85 16 Ld SOIC (N) M16.15 (Note) (Pb-free) HIN208ECA-T HIN208ECA 24 Ld SSOP Tape and M24.209 Reel HIN202EIBNZ-T 202EIBNZ 16 Ld SOIC (N) Tape and M16.15 (Note) Reel (Pb-free) HIN208ECAZ HIN208ECAZ 0 to 70 24 Ld SSOP M24.209 (Note) (Pb-free) HIN206ECB HIN206ECB 0 to 70 24 Ld SOIC M24.3 HIN208ECAZ-T HIN208ECAZ 24 Ld SSOP Tape and M24.209 HIN206ECB-T HIN206ECB 24 Ld SOIC Tape and M24.3 (Note) Reel (Pb-free) Reel HIN208ECAZA-T HIN208ECAZ 24 Ld SSOP Tape and M24.209 HIN206ECBZ HIN206ECBZ 0 to 70 24 Ld SOIC M24.3 (Note) Reel (Pb-free) (Note) (Pb-free) HIN208ECB HIN208ECB 0 to 70 24 Ld SOIC M24.3 HIN206ECBZ-T HIN206ECBZ 24 Ld SOIC Tape and M24.3 (Note) Reel (Pb-free) HIN208ECB-T HIN208ECB 24 Ld SOIC Tape and M24.3 Reel HIN206EIA HIN206EIA -40 to 85 24 Ld SSOP M24.209 HIN208ECBZ HIN208ECBZ 0 to 70 24 Ld SOIC M24.3 HIN206EIAZ HIN206EIAZ -40 to 85 24 Ld SSOP M24.209 (Note) (Pb-free) (Note) (Pb-free) HIN208ECBZ-T HIN208ECBZ 24 Ld SOIC Tape and M24.3 HIN206EIAZ-T HIN206EIAZ 24 Ld SSOP Tape and M24.209 (Note) Reel (Pb-free) (Note) Reel (Pb-free) HIN208EIA HIN208EIA -40 to 85 24 Ld SSOP M24.209 HIN206EIAZA HIN206EIAZ -40 to 85 24 Ld SSOP M24.209 (Note) (Pb-free) HIN208EIA-T HIN208EIA 24 Ld SSOP Tape and M24.209 Reel FN4315.16 2 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Ordering Information (Continued) Ordering Information (Continued) TEMP. TEMP. PART RANGE PKG. PART RANGE PKG. PART NO. MARKING (°C) PACKAGE DWG. # PART NO. MARKING (°C) PACKAGE DWG. # HIN208EIAZ HIN208EIAZ -40 to 85 24 Ld SSOP M24.209 HIN232ECA HIN232ECA 0 to 70 16 Ld SSOP M16.209 (Note) (Pb-free) HIN232ECA-T HIN232ECA 16 Ld SSOP Tape and M16.209 HIN208EIAZ-T HIN208EIAZ 24 Ld SSOP Tape and M24.209 Reel (Note) Reel (Pb-free) HIN232ECAZ-T HIN232ECAZ 16 Ld SSOP Tape and M16.209 HIN208EIB HIN208EIB -40 to 85 24 Ld SOIC M24.3 (Note) Reel (Pb-free) HIN208EIBZ HIN208EIBZ -40 to 85 24 Ld SOIC M24.3 HIN232ECB HIN232ECB 0 to 70 16 Ld SOIC (W) M16.3 (Note) (Pb-free) HIN232ECB-T HIN232ECB 16 Ld SOIC (W) Tape and M16.3 HIN211ECA HIN211ECA 0 to 70 28 Ld SSOP M28.209 Reel HIN211ECA-T HIN211ECA 28 Ld SSOP Tape and M28.209 HIN232ECBN HIN232ECBN 0 to 70 16 Ld SOIC (N) M16.15 Reel HIN232ECBN-T HIN232ECBN 16 Ld SOIC (N) Tape and M16.15 HIN211ECAZ HIN211ECAZ 0 to 70 28 Ld SSOP M28.209 Reel (Note) (Pb-free) HIN232ECBNZ 232ECBNZ 0 to 70 16 Ld SOIC (N) M16.15 HIN211ECAZ-T HIN211ECAZ 28 Ld SSOP Tape and M28.209 (Note) (Pb-free) (Note) Reel (Pb-free) HIN232ECBNZ-T 232ECBNZ 16 Ld SOIC (N) Tape and M16.15 HIN211ECB HIN211ECB 0 to 70 28 Ld SOIC M28.3 (Note) Reel (Pb-free) HIN211ECBZ HIN211ECBZ 0 to 70 28 Ld SOIC M28.3 HIN232ECBZ 232ECBZ 0 to 70 16 Ld SOIC (W) M16.3 (Note) (Pb-free) (Note) (Pb-free) HIN211ECBZ-T HIN211ECBZ 28 Ld SOIC Tape and M28.3 HIN232ECBZ-T 232ECBZ 16 Ld SOIC (W) Tape and M16.3 (Note) Reel (Pb-free) (Note) Reel (Pb-free) HIN211EIA HIN211EIA -40 to 85 28 Ld SSOP M28.209 HIN232ECP HIN232ECP 0 to 70 16 Ld PDIP E16.3 HIN211EIA-T HIN211EIA 28 Ld SSOP Tape and M28.209 HIN232ECPZ HIN232ECPZ 0 to 70 16 Ld PDIP* E16.3 Reel (Note) (Pb-free) HIN211EIAZ HIN211EIAZ -40 to 85 28 Ld SSOP M28.209 HIN232EIBN HIN232EIBN -40 to 85 16 Ld SOIC (N) M16.15 (Note) (Pb-free) HIN232EIBN-T HIN232EIBN 16 Ld SOIC (N) Tape and M16.15 HIN211EIAZ-T HIN211EIAZ 28 Ld SSOP Tape and M28.209 Reel (Note) Reel (Pb-free) HIN232EIBNZ 232EIBNZ -40 to 85 16 Ld SOIC (N) M16.15 HIN211EIB HIN211EIB -40 to 85 28 Ld SOIC M28.3 (Note) (Pb-free) HIN211EIBZ HIN211EIBZ -40 to 85 28 Ld SOIC M28.3 HIN232EIBNZ-T 232EIBNZ 16 Ld SOIC (N) Tape and M16.15 (Note) (Pb-free) (Note) Reel (Pb-free) HIN213ECA HIN213ECA 0 to 70 28 Ld SSOP M28.209 HIN232EIV HIN232EIV -40 to 85 16 Ld TSSOP M16.173 HIN213ECA-T HIN213ECA 28 Ld SSOP Tape and M28.209 HIN232EIV-T HIN232EIV 16 Ld TSSOP Tape and M16.173 Reel Reel HIN213ECAZ HIN213ECAZ 0 to 70 28 Ld SSOP M28.209 HIN232EIVZ 232EIVZ -40 to 85 16 Ld TSSOP M16.173 (Note) (Pb-free) (Note) (Pb-free) HIN213ECAZ-T HIN213ECAZ 28 Ld SSOP Tape and M28.209 HIN232EIVZ-T 232EIVZ 16 Ld TSSOP Tape and M16.173 (Note) Reel (Pb-free) (Note) Reel (Pb-free) HIN213EIA HIN213EIA -40 to 85 28 Ld SSOP M28.209 *Pb-free PDIPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing HIN213EIA-T HIN213EIA 28 Ld SSOP Tape and M28.209 applications. Reel NOTE: Intersil Pb-free plus anneal products employ special Pb-free HIN213EIAZ HIN213EIAZ -40 to 85 28 Ld SSOP M28.209 material sets; molding compounds/die attach materials and 100% (Note) (Pb-free) matte tin plate termination finish, which are RoHS compliant and HIN213EIAZ-T HIN213EIAZ 28 Ld SSOP Tape and M28.209 compatible with both SnPb and Pb-free soldering operations. Intersil (Note) Reel (Pb-free) Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of HIN213EIB HIN213EIB -40 to 85 28 Ld SOIC M28.3 IPC/JEDEC J STD-020. HIN213EIBZ HIN213EIBZ -40 to 85 28 Ld SOIC M28.3 (Note) (Pb-free) FN4315.16 3 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts HIN202E (PDIP, SOIC) HIN206E (SOIC, SSOP) TOP VIEW TOP VIEW 1 24 1 16 T3 T4 C1+ V OUT OUT CC 2 23 T1 R2 2 15 IN V+ OUT GND 3 22 R2 T2 OUT OUT 3 14 C1- T1 OUT R1 4 21 SD IN 4 13 R1 C2+ IN R1 5 20 EN OUT 5 12 R1 C2- OUT 6 19 T2 T4 IN IN 6 11 T1 V- IN 7 18 T1 T3 IN IN 10 T2 7 T2 OUT IN 8 17 R3 GND OUT 9 R2 8 R2 IN OUT V 9 16 R3 CC IN 10 15 C1+ V- 11 14 C2- V+ 13 C1- 12 C2+ +5V +5V 9 0.1µF 10 V + C1+ CC 16 + 11 0.1µF V+ +5V TO 10V 12 V 1 CC C1- VOLTAGE DOUBLER 0.1µF C1+ + 13 + 2 +5V TO 10V 0.1µF C2+ V+ 3 + VOLTAGE INVERTER +10V TO -10V 15 0.1µF C1- V- 14 VOLTAGE INVERTER C2- 0.1µF 4 + C2+ + +5V +10V TO -10V T1 6 0.1µF V- 2 5 7 400kΩ VOLTAGE INVERTER T1 C2- T1 0.1µF OUT IN + +5V T2 +5V T1 6 400kΩ 3 14 T2 11 400kΩ T2 IN OUT T1 T1 OUT IN +5V T3 18 400kΩ 1 +5V T2 T3 T3 OUT IN 10 400kΩ 7 T2 T2 OUT IN +5V T4 400kΩ 19 24 T4 T4 IN OUT 12 13 R1 R1 IN 5 4 OUT R1 R1 5kΩ OUT IN R1 5kΩ R1 9 8 R2 R2 IN OUT 22 23 R2 R2 5kΩ OUT IN R2 5kΩ R2 GND 17 16 15 R3 R3 IN OUT 5kΩ 21 R3 20 SD EN GND 8 FN4315.16 4 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN207E (SOIC, SSOP) HIN208E (SOIC, SSOP) TOP VIEW TOP VIEW T2 1 24 T3 OUT OUT T3 1 24 T4 OUT OUT T1 R3 2 23 OUT IN T1 2 23 R2 OUT IN R2 R3 3 22 IN OUT T2 3 22 R2 OUT OUT R2 T4 4 21 OUT IN R1 T5 4 21 IN IN T1 T4 IN 5 20 OUT R1 20 T5 5 OUT OUT R1 6 19 T3 OUT IN T2 6 19 T4 IN IN R1 T2 7 18 IN IN T1 7 18 T3 IN IN R4 GND 8 17 OUT GND 8 17 R3 OUT V R4 9 16 CC IN V R3 9 16 CC IN C1+ V- 10 15 C1+ 10 15 V- V+ C2- 11 14 V+ 11 14 C2- C1- 13 C2+ 12 C1- 13 C2+ 12 +5V +5V 9 0.1µF 9 10 V + C1+ CC 0.1µF 10 + 11 V + C1+ CC 0.1µF V+ +5V TO 10V + 11 12 0.1µF V+ C1- +5V TO 10V VOLTAGE DOUBLER 12 C1- 13 VOLTAGE DOUBLER C2+ 13 + +10V TO -10V C2+ 0.1µF 15 V- + 14 +10V TO -10V VOLTAGE INVERTER 0.1µF 15 V- C2- 0.1µF 14 VOLTAGE INVERTER + C2- 0.1µF +5V T1 + 2 400kΩ +5V 5 T1 T1 T1 OUT 2 IN 400kΩ 7 T1 T1 OUT IN +5V T2 18 400kΩ 1 +5V T2 T2 T2 OUT IN 6 400kΩ 3 T2 T2 OUT IN +5V T3 400kΩ +5V 19 24 T3 T3 T3 IN OUT 400kΩ 18 1 T3 T3 IN OUT +5V T4 400kΩ +5V 21 20 T4 T4 T4 OUT IN 400kΩ 19 24 T4 T4 OUT IN 6 7 R1 R1 OUT IN +5V T5 400kΩ 21 20 5kΩ R1 T5 T5 OUT IN 5 4 4 3 R1 R1 OUT IN R2 R2 OUT IN 5kΩ R1 5kΩ R2 22 23 22 23 R2 R2 R3 R3 OUT IN IN OUT 5kΩ 5kΩ R2 R3 17 16 17 16 R4 R4 IN R3 R3 OUT IN OUT 5kΩ 5kΩ R4 R3 GND GND 8 8 FN4315.16 5 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN211E (SOIC, SSOP) HIN213E (SOIC, SSOP) TOP VIEW TOP VIEW T3 1 28 T4 T3 1 28 T4 OUT OUT OUT OUT T1 2 27 R3 T1 2 27 R3 OUT IN OUT IN T2 3 26 R3 T2 3 26 R3 OUT OUT OUT OUT R2 4 25 SD R2 4 25 SD IN IN R2 5 24 EN 24 EN R2 5 OUT OUT T2 6 23 R4 T2 6 23 R4 IN IN IN IN T1 7 22 R4 T1 7 22 R4 IN OUT IN OUT R1 8 21 T4 R1 8 21 T4 IN OUT OUT IN R1 9 20 T3 R1 9 20 T3 IN IN IN IN 19 R5 GND 10 GND 10 19 R5 OUT OUT 11 18 R5 V V 11 18 R5 CC IN CC IN C1+ 12 17 V- C1+ 12 17 V- V+ 13 16 C2- V+ 13 16 C2- C1- 14 15 C2+ C1- 14 15 C2+ NOTE: R4 and R5 active in shutdown. +5V +5V 11 11 0.1µF 0.1µF 12 12 V V + + C1+ CC C1+ CC + 13 + 13 0.1µF V+ 0.1µF V+ +5V TO 10V +5V TO 10V 14 14 C1- VOLTAGE DOUBLER C1- VOLTAGE DOUBLER 15 15 C2+ C2+ + + +10V TO -10V +10V TO -10V 17 17 0.1µF 0.1µF V- V- 16 16 VOLTAGE INVERTER VOLTAGE INVERTER C2- C2- 0.1µF 0.1µF + + +5V +5V T1 T1 2 2 7 400kΩ 7 400kΩ T1 T1 T1 T1 OUT OUT IN IN +5V T2 +5V T2 6 400kΩ 3 6 400kΩ 3 T2 T2 T2 T2 OUT OUT IN IN +5V +5V T3 T3 400kΩ 400kΩ 20 1 20 1 T3 T3 T3 T3 OUT OUT IN IN +5V +5V T4 T4 400kΩ 400kΩ 21 28 21 28 T4 T4 T4 T4 IN OUT IN OUT 8 9 8 9 R1 R1 R1 R1 IN IN OUT OUT 5kΩ 5kΩ R1 R1 5 4 5 4 R2 R2 R2 R2 IN IN OUT OUT 5kΩ 5kΩ R2 R2 26 27 26 27 R3 R3 R3 R3 OUT IN OUT IN 5kΩ 5kΩ R3 R3 22 23 22 23 R4 R4 R4 R4 OUT IN OUT IN 5kΩ 5kΩ R4 R4 19 18 19 18 R5 R5 R5 R5 IN IN OUT OUT 5kΩ 5kΩ R5 R5 24 25 24 25 EN SD EN SD GND GND 10 10 FN4315.16 6 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Pinouts (Continued) HIN232E (PDIP, SOIC, SSOP, TSSOP) TOP VIEW +5V 16 V 1 16 1 C1+ V CC CC 0.1µF C1+ + + 2 +5V TO 10V 2 15 0.1µF V+ GND V+ 3 VOLTAGE INVERTER C1- 3 14 C1- T1 OUT 4 C2+ 4 13 C2+ R1 + IN +10V TO -10V 6 0.1µF V- 5 VOLTAGE INVERTER 5 12 R1 C2- C2- 0.1µF OUT + 6 11 T1 V- IN +5V T1 14 7 10 11 400kΩ T2 T2 OUT IN T1 T1 OUT IN 8 9 R2 R2 IN OUT +5V T2 10 400kΩ 7 T2 T2 OUT IN 12 13 R1 R1 IN OUT 5kΩ R1 9 8 R2 R2 IN OUT 5kΩ R2 GND 15 Pin Descriptions PIN FUNCTION V Power Supply Input 5V ±10%, (5V ±5% HIN207E). CC V+ Internally generated positive supply (+10V nominal). V- Internally generated negative supply (-10V nominal). GND Ground Lead. Connect to 0V. C1+ External capacitor (+ terminal) is connected to this lead. C1- External capacitor (- terminal) is connected to this lead. C2+ External capacitor (+ terminal) is connected to this lead. C2- External capacitor (- terminal) is connected to this lead. T Transmitter Inputs. These leads accept TTL/CMOS levels. An internal 400kΩ pull-up resistor to V is connected to each lead. IN CC T Transmitter Outputs. These are RS-232 levels (nominally ±10V). OUT R Receiver Inputs. These inputs accept RS-232 input levels. An internal 5kΩ pull-down resistor to GND is connected to each input. IN R Receiver Outputs. These are TTL/CMOS levels. OUT EN, EN Receiver Enable Input. With EN = 5V (HIN213E EN=0V), the receiver outputs are placed in a high impedance state. SD, SD Shutdown Input. With SD = 5V (HIN213E SD = 0V), the charge pump is disabled, the receiver outputs are in a high impedance state (except R4 and R5 of HIN213E) and the transmitters are shut off. NC No Connect. No connections are made to these leads. FN4315.16 7 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Absolute Maximum Ratings Thermal Information V to Ground. . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) < V < 6V Thermal Resistance (Typical, Note 1) θ (°C/W) CC CC JA V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . .(V -0.3V) < V+ < 12V CC 16 Ld SOIC (N) Package . . . . . . . . . . . . . . . . . . . . . 110 V- to Ground . . . . . . . . . . . . . . . . . . . . . . .-12V < V- < (GND +0.3V) 16 Ld SOIC (W) Package. . . . . . . . . . . . . . . . . . . . . 100 Input Voltages 16 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 155 T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V < V < (V+ +0.3V) IN IN 16 Ld TSSOP Package . . . . . . . . . . . . . . . . . . . . . . 145 R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30V IN 16 Ld PDIP Package* . . . . . . . . . . . . . . . . . . . . . . . 90 Output Voltages 24 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 75 T . . . . . . . . . . . . . . . . . . . .(V- -0.3V) < V < (V+ +0.3V) OUT TXOUT 24 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 135 R . . . . . . . . . . . . . . . . . (GND -0.3V) < V < (V+ +0.3V) OUT RXOUT 28 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 70 Short Circuit Duration 28 Ld SSOP Package . . . . . . . . . . . . . . . . . . . . . . . 100 T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous OUT Maximum Junction Temperature (Plastic Package) . . . . . . . . 150°C R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Continuous OUT Maximum Storage Temperature Range . . . . . . . . . .-65°C to 150°C ESD Classification . . . . . . . . . . . . . . . . . . . . See Specification Table Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C (SOIC and SSOP - Lead Tips Only) Operating Conditions *Pb-free PDIPs can be used for through hole wave solder Temperature Range processing only. They are not intended for use in Reflow solder HIN2XXECX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C processing applications. HIN2XXEIX. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to 85°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θ is measured with the component mounted on an evaluation PC board in free air. JA Electrical Specifications Test Conditions: V = +5V ±10%, (V = +5V ±5% HIN207E); C1-C4 = 0.1µF; T = Operating Temperature CC CC A Range PARAMETER TEST CONDITIONS MIN TYP MAX UNITS SUPPLY CURRENTS Power Supply Current, I No Load, HIN202E - 8 15 mA CC T = 25°C A HIN206E - HIN208E, HIN211E, -11 20 mA HIN213E HIN232E - 5 10 mA Shutdown Supply Current, I (SD) T = 25°C HIN206E, HIN211E - 1 10 µA CC A HIN213E - 15 50 µA LOGIC AND TRANSMITTER INPUTS, RECEIVER OUTPUTS Input Logic Low, V T , EN, SD, EN, SD -- 0.8 V lL IN Input Logic High, V T 2.0 - - V lH IN EN, SD, EN, SD 2.4 - - V Transmitter Input Pullup Current, I T = 0V - 15 200 µA P IN TTL/CMOS Receiver Output Voltage Low, V I = 1.6mA (HIN202E, HIN232E, I = 3.2mA) - 0.1 0.4 V OL OUT OUT TTL/CMOS Receiver Output Voltage High, V I = -1mA 3.5 4.6 - V OH OUT TTL/CMOS Receiver Output Leakage EN = V , EN = 0, 0V < R < V -0.5 ±10 µA CC OUT CC RECEIVER INPUTS RS-232 Input Voltage Range, V -30 - +30 V IN Receiver Input Impedance, R T = 25°C, V = ±3V 3.0 5.0 7.0 kΩ IN A IN Receiver Input Low Threshold, V (H-L) V = 5V, Active Mode - 1.2 - V IN CC T = 25°C A Shutdown Mode HIN213E R4 and R5 - 1.5 - V Receiver Input High Threshold, V (L-H) V = 5V, Active Mode - 1.7 2.4 V IN CC T = 25°C A Shutdown Mode HIN213E R4 and R5 - 1.5 2.4 V Receiver Input Hysteresis, V V = 5V, No Hysteresis in Shutdown Mode 0.2 0.5 1.0 V HYST CC FN4315.16 8 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Electrical Specifications Test Conditions: V = +5V ±10%, (V = +5V ±5% HIN207E); C1-C4 = 0.1µF; T = Operating Temperature CC CC A Range (Continued) PARAMETER TEST CONDITIONS MIN TYP MAX UNITS TIMING CHARACTERISTICS Output Enable Time, t HIN206E, HIN211E, HIN213E - 600 - ns EN Output Disable Time, t HIN206E, HIN211E, HIN213E - 200 - ns DIS Transmitter, Receiver Propagation Delay, t HIN213E SD = 0V, R4, R5 - 4.0 40 µs PD HIN213E SD = V , R1 - R5 - 0.5 10 µs CC All except HIN213E - 0.5 10 µs Transition Region Slew Rate, SR R = 3kΩ, C = 1000pF Measured from +3V to -3V 320 45 V/µs T L L or -3V to +3V, 1 Transmitter Switching (Note 2) TRANSMITTER OUTPUTS Output Voltage Swing, T Transmitter Outputs, 3kΩ to Ground ±5 ±9 ±10 V OUT Output Resistance, T V = V+ = V- = 0V, V = ±2V 300 - - Ω OUT CC OUT RS-232 Output Short Circuit Current, I T Shorted to GND - ±10 - mA SC OUT ESD PERFORMANCE RS-232 Pins Human Body Model - ±15 - kV (T , R ) OUT IN IEC61000-4-2 Contact Discharge - ±8- kV IEC61000-4-2 Air Gap (Note 3) - ±15 - kV All Other Pins Human Body Model - ±2- kV NOTES: 2. Guaranteed by design. 3. Meets Level 4. Test Circuits (HIN232E) +4.5V TO C1+ 1 V 16 CC +5.5V INPUT 2 V+ GND 15 - 0.1µF C3 + 3 C1- T1 14 OUT 1 C1+ V 16 CC 4 C2+ R1 13 IN + 0.1µF 3kΩ 2 V+ GND 15 C1 5 C2- R1 12 - OUT T1 3 C1- 14 T1 OUTPUT OUT T1 6 V- 11 IN 4 C2+ R1 13 RS-232 ±30V INPUT + IN 0.1µF T2 T2 7 OUT 10 IN C2 - 5 C2- R1 12 TTL/CMOS OUTPUT OUT R2 R2 9 8 IN OUT 6 V- T1 11 TTL/CMOS INPUT IN 0.1µF C4 T2 7 T2 10 TTL/CMOS INPUT OUT IN 3kΩ R = V /I T2 OUT IN OUT 8 R2 9 TTL/CMOS OUTPUT R2 IN OUT T1 T2 OUT OUTPUT V = ±2V IN A RS-232 ±30V INPUT FIGURE 1. GENERAL TEST CIRCUIT FIGURE 2. POWER-OFF SOURCE RESISTANCE CONFIGURATION FN4315.16 9 November 4, 2005 + - HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E VOLTAGE DOUBLER VOLTAGE INVERTER S1 S2 S5 C2+ C1+ V+ = 2V S6 CC V GND CC + + + + C1 C3 C2 C4 - - - - V GND CC V- = - (V+) GND S3 C1- S4 S7 C2- S8 RC OSCILLATOR FIGURE 3. CHARGE PUMP and (V+ -0.6V). Each transmitter input has an internal 400kΩ Detailed Description pullup resistor so any unused input can be left unconnected The HIN2XXE family of high-speed RS-232 and its output remains in its low state. The output voltage transmitters/receivers are powered by a single +5V power swing meets the RS-232C specifications of ±5V minimum supply, feature low power consumption, and meet all ElA with the worst case conditions of: all transmitters driving 3kΩ RS232C and V.28 specifications. The circuit is divided into minimum load impedance, V = 4.5V, and maximum CC three sections: the charge pump, transmitter, and receiver. allowable operating temperature. The transmitters have an Charge Pump internally limited output slew rate which is less than 30V/µs. The outputs are short circuit protected and can be shorted to An equivalent circuit of the charge pump is illustrated in ground indefinitely. The powered down output impedance is Figure 3. The charge pump contains two sections: the a minimum of 300Ω with ±2V applied to the outputs and voltage doubler and the voltage inverter. Each section is V = 0V. driven by a two phase, internally generated clock to CC generate +10V and -10V. The nominal clock frequency is Receivers 125kHz. During phase one of the clock, capacitor C1 is The receiver inputs accept up to ±30V while presenting the charged to V . During phase two, the voltage on C1 is CC required 3kΩ to 7kΩ input impedance even if the power is off added to V , producing a signal across C3 equal to twice CC (V = 0V). The receivers have a typical input threshold of CC V . During phase two, C2 is also charged to 2V , and CC CC 1.3V which is within the ±3V limits, known as the transition then during phase one, it is inverted with respect to ground region, of the RS-232 specifications. The receiver output is to produce a signal across C4 equal to -2V . The charge CC 0V to V . The output will be low whenever the input is CC pump accepts input voltages up to 5.5V. The output greater than 2.4V and high whenever the input is floating or impedance of the voltage doubler section (V+) is driven between +0.8V and -30V. The receivers feature 0.5V approximately 200Ω, and the output impedance of the hysteresis (except during shutdown) to improve noise voltage inverter section (V-) is approximately 450Ω. A typical rejection. The receiver Enable line EN, (EN on HIN213E) application uses 0.1µF capacitors for C1-C4, however, the when unasserted, disables the receiver outputs, placing value is not critical. Increasing the values of C1 and C2 will them in the high impedance mode. The receiver outputs are lower the output impedance of the voltage doubler and also placed in the high impedance state when in shutdown inverter, increasing the values of the reservoir capacitors, C3 mode (except HIN213E R4 and R5). and C4, lowers the ripple on the V+ and V- supplies. During shutdown mode (HIN206E, HIN211E and HIN213E) V+ the charge pump is turned off, V+ is pulled down to V , V- CC V CC is pulled up to GND, and the supply current is reduced to 400kΩ 300Ω less than 10µA. The transmitter outputs are disabled and the T XIN T OUT receiver outputs (except for HIN213E, R4 and R5) are GND < T < V XIN CC V- < V < V+ TOUT placed in the high impedance state. V- Transmitters The transmitters are TTL/CMOS compatible inverters which FIGURE 4. TRANSMITTER translate the inputs to RS-232 outputs. The input logic threshold is about 26% of V , or 1.3V for V = 5V. A logic CC CC 1 at the input results in a voltage of between -5V and V- at the output, and a logic 0 results in a voltage between +5V FN4315.16 10 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Application Information V CC The HIN2XXE may be used for all RS-232 data terminal and R XIN R OUT communication links. It is particularly useful in applications -30V < R < +30V XIN 5kΩ GND < V < V ROUT CC where ±12V power supplies are not available for GND conventional RS-232 interface circuits. The applications presented represent typical interface configurations. FIGURE 5. RECEIVER A simple duplex RS-232 port with CTS/RTS handshaking is illustrated in Figure 7. Fixed output signals such as DTR (data terminal ready) and DSRS (data signaling rate select) is generated by driving them through a 5kΩ resistor connected to V+. T IN OR In applications requiring four RS-232 inputs and outputs R IN (Figure 8), note that each circuit requires two charge pump T OUT V OL capacitors (C1 and C2) but can share common reservoir OR V OL R OUT capacitors (C3 and C4). The benefit of sharing common t t PHL PLH reservoir capacitors is the elimination of two capacitors and the reduction of the charge pump source impedance which t t PHL + PLH AVERAGE PROPAGATION DELAY = effectively increases the output swing of the transmitters. 2 FIGURE 6. PROPAGATION DELAY DEFINITION +5V - HIN213E Operation in Shutdown + 16 CTR (20) DATA 1 The HIN213E features two receivers, R4 and R5, which + TERMINAL READY C1 0.1µF 3 DSRS (24) DATA remain active in shutdown mode. During normal operation - HIN232E SIGNALING RATE the receivers propagation delay is typically 0.5µs. This 4 6 SELECT + - C2 propagation delay may increase slightly during shutdown. RS-232 5 0.1µF - + When entering shut down mode, receivers R4 and R5 are INPUTS AND OUTPUTS T1 11 14 not valid for 80µs after SD = V . When exiting shutdown TD TD (2) TRANSMIT DATA IL T2 mode, all receiver outputs will be invalid until the charge 10 7 RTS (4) REQUEST TO SEND INPUTS RTS pump circuitry reaches normal operating voltage. This is OUTPUTS 12 13 RD (3) RECEIVE DATA RD TTL/CMOS typically less than 2ms when using 0.1µF capacitors. R2 R1 9 8 CTS CTS (5) CLEAR TO SEND 15 SIGNAL GROUND (7) FIGURE 7. SIMPLE DUPLEX RS-232 PORT WITH CTS/RTS HANDSHAKING FN4315.16 11 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E 1 4 + + C1 C2 HIN232E 0.1µF 3 5 0.1µF - - T1 11 14 TD TD (2) TRANSMIT DATA T2 10 7 INPUTS RTS RTS (4) REQUEST TO SEND OUTPUTS 12 13 TTL/CMOS RD RD (3) RECEIVE DATA R2 R1 9 8 CTS CTS (5) CLEAR TO SEND 15 V 16 CC 6 2 C4 C3 +5V - - V- V+ RS-232 0.2µF 0.2µF 6 2 INPUTS AND OUTPUTS 16 V CC HIN232E 1 4 + + C1 C2 5 0.1µF 3 0.1µF - - T1 11 14 DTR DTR (20) DATA TERMINAL READY T2 10 7 INPUTS DSRS (24) DATA SIGNALING RATE SELECT DSRS OUTPUTS 12 13 DCD (8) DATA CARRIER DETECT TTL/CMOS DCD R2 R1 9 8 R1 R1 (22) RING INDICATOR 15 SIGNAL GROUND (7) FIGURE 8. COMBINING TWO HIN232Es FOR 4 PAIRS OF RS-232 INPUTS AND OUTPUTS Typical Performance Curves 12 12 0.1µF 10 10 V+ (V = 5V) CC 8 8 6 6 V+ (V = 4V) CC V- (V = 4V) CC 4 4 T = 25°C A 2 2 V- (V = 5V) CC TRANSMITTER OUTPUTS OPEN CIRCUIT 0 0 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 5 10 15 20 25 30 35 V |I | (mA) CC LOAD FIGURE 9. V- SUPPLY VOLTAGE vs V FIGURE 10. V+, V- OUTPUT VOLTAGE vs LOAD CC FN4315.16 12 November 4, 2005 V- SUPPLY VOLTAGE (V) + + SUPPLY VOLTAGE (|V|) HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Die Characteristics METALLIZATION: PASSIVATION: Type: Al Type: Nitride over Silox Thickness: 10kÅ ±1kÅ Nitride Thickness: 8kÅ Silox Thickness: 7kÅ SUBSTRATE POTENTIAL TRANSISTOR COUNT: GND 185 PROCESS: CMOS Metal Gate Metallization Mask Layout HIN232E V- C2- C2+ C1- PIN 6 PIN 5 PIN 4 PIN 3 PIN 2 V+ PIN 1 C1+ T2 PIN 7 OUT R2 PIN 8 IN T3 PIN 9 OUT PIN 17 V CC R2 PIN 10 OUT PIN 11 PIN 12 PIN 13 PIN 14 PIN 15 PIN 16 T2 T1 R1 R1 T1 GND IN IN OUT IN OUT FN4315.16 13 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Dual-In-Line Plastic Packages (PDIP) E16.3 (JEDEC MS-001-BB ISSUE D) N 16 LEAD DUAL-IN-LINE PLASTIC PACKAGE E1 INDEX INCHES MILLIMETERS 12 3 N/2 AREA SYMBOL MIN MAX MIN MAX NOTES -B- A - 0.210 - 5.33 4 -A- A1 0.015 - 0.39 - 4 D E BASE A2 0.115 0.195 2.93 4.95 - PLANE A2 A -C- B 0.014 0.022 0.356 0.558 - SEATING PLANE B1 0.045 0.070 1.15 1.77 8, 10 L C L D1 C 0.008 0.014 0.204 0.355 - e A1 A D1 e B1 D 0.735 0.775 18.66 19.68 5 e C C B D1 0.005 - 0.13 - 5 e B 0.010 (0.25) M C A BS E 0.300 0.325 7.62 8.25 6 NOTES: E1 0.240 0.280 6.10 7.11 5 1. Controlling Dimensions: INCH. In case of conflict between English and e 0.100 BSC 2.54 BSC - Metric dimensions, the inch dimensions control. e 0.300 BSC 7.62 BSC 6 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. A 3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of e - 0.430 - 10.92 7 B Publication No. 95. L 0.115 0.150 2.93 3.81 4 4. Dimensions A, A1 and L are measured with the package seated in JE- N16 16 9 DEC seating plane gauge GS-3. Rev. 0 12/93 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 inch (0.25mm). e 6. E and are measured with the leads constrained to be perpendic- A -C- ular to datum . 7. e and e are measured at the lead tips with the leads unconstrained. B C e must be zero or greater. C 8. B1 maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). FN4315.16 14 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) M16.15 (JEDEC MS-012-AC ISSUE C) N 16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M H AREA INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0532 0.0688 1.35 1.75 - 12 3 A1 0.0040 0.0098 0.10 0.25 - L B 0.013 0.020 0.33 0.51 9 SEATING PLANE C 0.0075 0.0098 0.19 0.25 - -A- A D 0.3859 0.3937 9.80 10.00 3 h x 45° D E 0.1497 0.1574 3.80 4.00 4 -C- e 0.050 BSC 1.27 BSC - α H 0.2284 0.2440 5.80 6.20 - e A1 C h 0.0099 0.0196 0.25 0.50 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M BS N16 16 7 NOTES: 0° 8° 0° 8° - α 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Rev. 1 6/05 Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315.16 15 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Thin Shrink Small Outline Plastic Packages (TSSOP) M16.173 N 16 LEAD THIN SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M E AREA INCHES MILLIMETERS E1 GAUGE SYMBOL MIN MAX MIN MAX NOTES PLANE -B- A - 0.043 - 1.10 - A1 0.002 0.006 0.05 0.15 - 12 3 A2 0.033 0.037 0.85 0.95 - L 0.25 0.05(0.002) SEATING PLANE b 0.0075 0.012 0.19 0.30 9 0.010 -A- c 0.0035 0.008 0.09 0.20 - A D D 0.193 0.201 4.90 5.10 3 -C- E1 0.169 0.177 4.30 4.50 4 α e 0.026 BSC 0.65 BSC - A2 e A1 c E 0.246 0.256 6.25 6.50 - b 0.10(0.004) L 0.020 0.028 0.50 0.70 6 0.10(0.004) M C A M BS N16 16 7 o o o o 0 8 0 8 - α NOTES: Rev. 1 2/02 1. These package dimensions are within allowable dimensions of JEDEC MO-153-AB, Issue E. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. Controlling dimension: MILLIMETER. Converted inch dimen- sions are not necessarily exact. (Angles in degrees) FN4315.16 16 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SSOP) M16.209 (JEDEC MO-150-AC ISSUE B) N 16 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M H AREA INCHES MILLIMETERS E GAUGE SYMBOL MIN MAX MIN MAX NOTES PLANE -B- A - 0.078 - 2.00 - A1 0.002 - 0.05 - - 12 3 A2 0.065 0.072 1.65 1.85 - L 0.25 SEATING PLANE B 0.009 0.014 0.22 0.38 9 0.010 -A- C 0.004 0.009 0.09 0.25 - D A D 0.233 0.255 5.90 6.50 3 -C- E 0.197 0.220 5.00 5.60 4 α e 0.026 BSC 0.65 BSC - A2 e A1 C H 0.292 0.322 7.40 8.20 - B 0.10(0.004) L 0.022 0.037 0.55 0.95 6 0.25(0.010) M C A M BS N16 16 7 0° 8° 0° 8° - α NOTES: Rev. 3 6/05 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen- sion at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315.16 17 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) M16.3 (JEDEC MS-013-AA ISSUE C) N 16 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M H AREA INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - 12 3 L B 0.013 0.0200 0.33 0.51 9 SEATING PLANE C 0.0091 0.0125 0.23 0.32 - -A- D 0.3977 0.4133 10.10 10.50 3 A h x 45° D E 0.2914 0.2992 7.40 7.60 4 -C- e 0.050 BSC 1.27 BSC - α H 0.394 0.419 10.00 10.65 - e A1 C h 0.010 0.029 0.25 0.75 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M BS N16 16 7 0° 8° 0° 8° - α NOTES: Rev. 1 6/05 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315.16 18 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) M24.209 (JEDEC MO-150-AG ISSUE B) N 24 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M H AREA INCHES MILLIMETERS E GAUGE SYMBOL MIN MAX MIN MAX NOTES PLANE -B- A - 0.078 - 2.00 - A1 0.002 - 0.05 - - 12 3 A2 0.065 0.072 1.65 1.85 - L 0.25 SEATING PLANE B 0.009 0.014 0.22 0.38 9 0.010 -A- C 0.004 0.009 0.09 0.25 - D A D 0.312 0.334 7.90 8.50 3 -C- E 0.197 0.220 5.00 5.60 4 α µ e 0.026 BSC 0.65 BSC - A2 e A1 C H 0.292 0.322 7.40 8.20 - B 0.10(0.004) L 0.022 0.037 0.55 0.95 6 0.25(0.010) M C A M BS N24 24 7 o o o o 0 8 0 8 - α NOTES: Rev. 1 3/95 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Inter- lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimen- sion at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315.16 19 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) M24.3 (JEDEC MS-013-AD ISSUE C) N 24 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M H AREA INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - 12 3 L B 0.013 0.020 0.33 0.51 9 SEATING PLANE C 0.0091 0.0125 0.23 0.32 - -A- o D 0.5985 0.6141 15.20 15.60 3 A h x 45 D E 0.2914 0.2992 7.40 7.60 4 -C- e 0.05 BSC 1.27 BSC - α µ H 0.394 0.419 10.00 10.65 - e A1 C h 0.010 0.029 0.25 0.75 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M BS N24 24 7 o o o o 0 8 0 8 - NOTES: α 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Rev. 0 12/93 Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Inter- lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315.16 20 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Shrink Small Outline Plastic Packages (SSOP) M28.209 (JEDEC MO-150-AH ISSUE B) N 28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M H AREA INCHES MILLIMETERS E GAUGE SYMBOL MIN MAX MIN MAX NOTES PLANE -B- A - 0.078 - 2.00 - A1 0.002 - 0.05 - - 12 3 A2 0.065 0.072 1.65 1.85 - L 0.25 SEATING PLANE B 0.009 0.014 0.22 0.38 9 0.010 -A- C 0.004 0.009 0.09 0.25 - D A D 0.390 0.413 9.90 10.50 3 -C- E 0.197 0.220 5.00 5.60 4 α e 0.026 BSC 0.65 BSC - A2 e A1 C H 0.292 0.322 7.40 8.20 - B 0.10(0.004) L 0.022 0.037 0.55 0.95 6 0.25(0.010) M C A M BS N28 28 7 NOTES: 0° 8° 0° 8° - α 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 Rev. 2 6/05 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. Dimension “B” does not include dambar protrusion. Allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of “B” dimension at maximum material condition. 10. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. FN4315.16 21 November 4, 2005 HIN202E, HIN206E, HIN207E, HIN208E, HIN211E, HIN213E, HIN232E Small Outline Plastic Packages (SOIC) M28.3 (JEDEC MS-013-AE ISSUE C) N 28 LEAD WIDE BODY SMALL OUTLINE PLASTIC PACKAGE INDEX 0.25(0.010) M B M H AREA INCHES MILLIMETERS E SYMBOL MIN MAX MIN MAX NOTES -B- A 0.0926 0.1043 2.35 2.65 - A1 0.0040 0.0118 0.10 0.30 - 12 3 L B 0.013 0.0200 0.33 0.51 9 SEATING PLANE C 0.0091 0.0125 0.23 0.32 - -A- D 0.6969 0.7125 17.70 18.10 3 o A h x 45 D E 0.2914 0.2992 7.40 7.60 4 e 0.05 BSC 1.27 BSC - -C- α µ H 0.394 0.419 10.00 10.65 - e A1 C h 0.01 0.029 0.25 0.75 5 B 0.10(0.004) L 0.016 0.050 0.40 1.27 6 0.25(0.010) M C A M BS N28 28 7 o o o o 0 8 0 8 - α NOTES: Rev. 0 12/93 1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of Publication Number 95. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. Dimension “E” does not include interlead flash or protrusions. In- terlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area. 6. “L” is the length of terminal for soldering to a substrate. 7. “N” is the number of terminal positions. 8. Terminal numbers are shown for reference only. 9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. Controlling dimension: MILLIMETER. Converted inch dimen- sions are not necessarily exact. All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN4315.16 22 November 4, 2005