SVME/DMV-177 PowerPC 603e Single Board Computer with MAXPack Interface Features ·PowerPCÔ 603e RISC CPU at 100MHz* Up to 64M bytes DRAM with EDAC 8Mbytes 64-bit Flash™ EPROM 2Mbytes low cost boot Flash™ EPROM 256kbyte EEPROM ·512 byte serial EEPROM ·Support for one MAXPack module, providing flexible I/O expansion ·On-board Ethernet with AUI interface ·On-board SCSI-2 interface ·Four 16-bit counter/timers ·Two EIA-422 and two EIA-423 serial channels ·Real-Time Clock (RTC) ·Tick and watchdog timers ·Advanced VME Interface Chip (SCV64) ·A32:D32 VMEbus interface with A64:D64 MBLT support per ANSI/VITA 1-1994, VME64 ·Location monitor with FIFO buffer Description ® ·Bus Isolation mode (BI-mode ) ·Auto-ID and Auto-SYSCON ·System controller functions ·Built-In-Test (BIT) ·95% fault coverage ·Front-panel JTAG/COP™ Interface ·Foundation firmware including: ·Debug monitor ·Diagnostics ·Card Support Services ·Execution Sequencer Non Volatile Memory Programmer ·Conduction cooled per IEEE 1101.2 (0.80- inch pitch) for MIL-E-5400/4158, and MIL-STD-2036 applications ·Optional levels of ruggedization * Contact DY 4 for latest CPU speed availability MS00252 Revision C March 1997 Page 1 developing their own custom module. of several standard MAXPack modules, or assembly's functionality by incorporating one allows system designers to increase the standard mezzanine module approach which 4's MAXPack interface, an openwith DY system requirements. The card is equipped · modes provide power savings to match included on-board. Programmable low-power et, SCSI-2, and four serial ports arernEthe Numerous sub-system functions including Flash EPROM on a single-slot assembly. Correction, together with up to 10M bytes of 64M bytes of DRAM, with Error Detection and PowerPC 603e RISC processor with up to MHzance 100rmcombines a high-perfo Single Board ComputerSVME/DMV-177 thePowerPC-based SBC products, 4The latest in the growing line of DY · · · · SVME/DMV-177 Processor Memory Bus 64 64 64 64 PowerPC PPC to Peripheral 64MB DRAM 8MB 64-bit 603e Bus Bridge with EDAC Flash EPROM 512 byte EEPROM 256kB 2MB Flash EEPROM EPROM RTC Counter 16 16 Timers (4) Data Packer/DMA 8 16 32 Peripheral Bus 8 16 8 32 8 32 SCV64 MAXPack UART Ethernet SCSI Serial Comm Interface 2-RS-423 Controller RS-422 VME I/F Buffers VMEbus P2 I/O Front Panel P0 I/O Figure 1: SVME/DMV-177 Block Diagram Page 2 DY 4 Systems Inc. MS00252 Revision C March 1997 D01903A FIFOFIFO DMA boards to be self-configuring, based on slot monitor, and Auto ID. These features bring overhead in real-time software. Auto-ID allows interface, Built-In-Test (BIT), BI-mode, location interprocessor messaging, to minimize features including an VME64 VMEbus The location monitor supports efficient 4 Systems' commonThe card supports DY system fault location. test coverage and functional density. (BI-mode®) increases ease of testing and ance, self-rmwith increased computing perfo circuits on the module. Bus Isolation mode military and aerospace systems integrators (BIT) hardware features verify all operational features address mission-critical demands of with high sustained throughputs. Built-In-Test designSVME/DMV-177’s. The 177 SBC combines low-latency access to the VMEbus SVME/DMV-shows a block diagram of the with software-programmable features. It traditionally required multiple boards. Figure 1 implements all VMEbus interface functions standard I/O, and User-specific I/O which 4's industry-standard SCV64 chipDY ance, industryrmwith raw processing perfo maintenance.integrated approach in a single-slot solution ance, logistics andrmbenefits in perfo provides a highlySVME/DMV-177The SVME/DMV-177 · · ·r · · · · · · · Memory · · · CPU MS00252 Revision C March 1997 DY 4 Systems Inc. Page 3 PowerPC 603e CPU integrates the following: programmable power-saving modes, the caches, 64-bit data paths, and software serial EEPROM for storing configuration data.Containing separate instruction and data SBC has a 512 byteSVME/DMV-177The cache on). et port.rnthe serial port, or the Ethe SPECint92 and 105 SPECfp92 (with internal (NVMP) or FlashProg utility over the VMEbus, and offers estimated benchmarks 120 integrated Non-Volatile Memory Programmer MHz on-chip runs at 100177SVME/DMV- 4'sre-programmable in-circuit via DY industry. The PowerPC 603e on the Non-volatile memory is not VME-visible and is Motorola for the growing commercial desktop EEPROM are also available.microprocessor developed by Apple, IBM, and memory boot site and 256K bytes ofance, low-power 64-bit RISCrmperfo bytes Flashfrom EPROM. A low-cost 2MThe PowerPC 603e CPU is a high- ance program execution directlyrmhigh perfo Application Flash provides the capability of 16-bit wide Application EEPROM ruggedization levels 100 and 200. 16-bit wide low-cost boot Flash 4cooled versions are available in DY 64-bit wide Application Flash connection to the chassis. DMV conduction- consists of: alrmwedgelock fasteners give a reliable the storage. On-board non-volatile memory dissipation and vibration resistance. Standard 10M bytes of on-board non-volatile memory additional stiffening frame improves heat Flash EPROM and EEPROM devices for over conducts heat away from the electronics. An supports of a mix of177The SVME/DMV- STD-2036. A Copper Core Cooled PWB defined by MIL-E-4158, MIL-E-5400, and MIL- EDAC turned off (6.4.4.4. with EDAC on). designed for severe environmental conditions ance withrmproviding 5.3.3.3 burst perfo Systems' conduction-cooled products are PowerPC 603e burst mode accesses, 4salt-fog, sand, and dust contamination. DY The memory interface design supports be sealed in a chassis to prevent moisture, et chips, and the MAXPack interface.rnEthe military applications where circuit cards could on-board CPU, the VMEbus, the SCSI and e, land-mobile, and navalrndesigned for airbo Mbytes. The memory is accessible from the The conduction-cooled DMV version is factory configured as either 8, 16, 32 or 64 ance DRAM which can bermof high perfo 100 and 200. memory mezzanine module. Memory consists 4 ruggedization levels 000,available in DY SBC DRAM is located on aSVME/DMV-177 available. SVME air-cooled versions are and not all memory configurations are Ethernet is omitted on level 200/300 product functionally identical with the exception that 3.3V design with 4 power-down modes areSVME/DMV-177All versions of the 32- or 64-bit data bus logistics. 16K byte data cache minimize field maintenance and sparing 16K byte instruction cache detect and isolate faults during operation 5 separate parallel instruction units systems (FPP) build high-performance multi-processo 32- and 64-bit Floating Point Processor These features allow users to: architecture location. Superscalar multiple instruction-per-cycle SVME/DMV-177 Figure 2: Base Board with MAXPack (Shown with memory module) MAXPack Interface Programmable Power Modes VME Interface Page 4 DY 4 Systems Inc. MS00252 Revision C March 1997 SBC. Figure 2 shows aSVME/DMV-177 are brought out on the P2 connector of the need for jumpers, thereby simplifying logistics All I/O connections of the MAXPack module nate theprogrammable features that elimi of the SCV64 design is to provide heat removal. face. The philosophycomplete VMEbus inter al path forrmprovides a low-resistance the (SCV64), which provides all the elements of a arrangement is structurally rigid, and it standard Single Chip VMEbus Interface, along a rib parallel to the card edge. This 4's industry-SBC is implemented with DY177 board along three stiffening ribs and also SVME/DMV-The VMEbus interface of the modules are rigidly mounted to the base high shock and vibration environments. The The MAXPack mechanical design is suited to memory and sub-system options.software invested in the MAXPack. SBC configured with the maximum amount ofance growth path that preserves thermperfo results in 14 W consumption (typical) for ansame MAXPacks, thus providing a 19 W consumption (typical) while Idle Mode 4's RISC-based SBCs will carry theof DY system control, full-power operation results inspecial function modules. Future generations featured military product. Under operatingitting customers to designrminterface, thus pe conditions, resulting in a very low power full-that defines the electrical and mechanical lower the power consumption under certain to an open specificationrmmodules confo programmable power saving modes whichI/O functions to the base board. MAXPack has several User-SVME/DMV-177The MAXPacks may be used to add a variety of MAXPack mezzanine module interface. SBC is equipped with aSVME/DMV-177 The memory module.SVME/DMV-177 conceptual view of the assembly with the SVME/DMV-177 · · · · · · SCSI-2 Interface 5 Serial Interfaces Ethernet Interface MS00252 Revision C March 1997 DY 4 Systems Inc. Page 5 incorporated into a deployed system for a 10 connector. level download and debug or may be but may be optionally routed to the P2 100, this LAN interface may be used for card- are normally available on the P0 connector SVME and DMV versions at level 000 and connectors.The two EIA-422 serial channels elsewhere in the system. Available in both or they may be optionally routed to the P2 et boardrnrequirement for a separate Ethe front panel connector on the SVME versions interface is provided to eliminate the are available at the P0 connector and at the etrnAn on-board IEEE 802.3 compliant Ethe software control. The EIA-423 serial channels Interrupts are also programmable under programmable from 75 to 38.4K bps. The data rates of the EIA-423 channels are FIFO with 31 entries. channels support handshaking (1 in/1 out). message queue is organized as a 32-bit wide be operated at up to 1M bps. Both EIA-422 data, and causes an interrupt to the CPU. The By using the DMA support one channel can access to the LM results in capture of the channels support data rates up to 613K bps. with a built-in FIFO message queue. A write bps. In synchronous mode the EIA-422 the SCV64 provides a location monitor (LM) asynchronous data rates of from 75 to 38.4K To support inter-processor message passing, channels. The EIA-422 channels support Mbytes/sec may be achieved.put of up to 60 nous EIA-423 serialand two asynchro multiplexed block (D64) mode. Real through- nous/synchronous EIA-422 serial channels configured to occur in discrete, block, or The SVME/DMV-177 provides two asynchro- DMAC. Bi-directional transfers can be VMEbus, the SCV64 provides an integral data between on-board memory and the grant received. For moving large blocks of of the memory bandwidth. VMEbus is requested, arbitrated, and the bus 32-bit words, resulting in more efficient usage locations without incurring a delay while the The DMA data packer assembles bytes into equipped CPUs can write to VMEbus data is being transferred to the SCSI bus. forward technique of bus decoupling. SCV64- continue to handle processing tasks while which are used to implement a store-and- and the other on-board I/O processors to SCV64 contains transmit and receive FIFO's controller IC. This allows the PowerPC 603e the VMEbus to access on-board memory. The between the local memory and the SCSI the CPU to access the VMEbus, and to allow independently of the PowerPC to transfer data A primary function of the SCV64 is to allow supported. The DMA controller acts Mbytes/second (synchronous) are10 extensive BIT features and BI-mode ®. Mbytes/second (asynchronous) or levels and vectors. The SCV64 also features DMA controller, peak SCSI bus speeds of levels, arbiter modes, bus timers, interrupt Using the QLOGIC Fas 216 and a high speed full programmability of requester modes and ended, 8-bit wide SCSI-2 compliant interface. controller and interrupt functions. It allows for provides a single-SVME/DMV-177The The SCV64 provides all VMEbus system Extensive Built-in-Test support Interrupter, interrupt handler 83932B SONIC™ device. Location monitor with FIFO message queue implemented with a National Semiconductor Tx and Rx FIFO's to decouple bus operations connectors. The LAN interface is Master/slave A64:D64 interface versions use the P0 of P2 backplane System Controller port is available on the SVME versions. DMV er-coupled front-panel AUIrm3-pair transforates the following features:SCV64 incorpo Mbit/s communication port. A fuse-protectedand reducing sparing requirements. The SVME/DMV-177 Real-Time Clock (RTC) Ò Available MAXPacks Timers · · · Foundation Firmware Foundation Firmware System Status Signals/Switches · · · JTAG/COPÔÔ Interface · · Page 6 DY 4 Systems Inc. MS00252 Revision C March 1997 boundary scan features can be used for memory. connector (SVME only) and P0. The JTAG provides for in-circuit programming of Flash (COP) functions via a front panel 16-pin Non Volatile Memory Programmer (NVMP) - JTAG and Common On-chip Processor Configuration Items on the card implements the 603e'sSVME/DMV -177 The invocation order of the Software Execution Sequencer (ES) - controls the routines, and Auto-ID services functions generic exception processing only (card reset is also available via P0). features on the card, device independent I/O mounted on the front panel in SVME versions common software interface to the hardware LED is included. A card reset switch is Card Support Services (CSS) - provides a chassis. A User programmable status green equipment incorporated in a sealed conduction-cooled function in conjunction with the Built-In-Test itting a test connector to bermLED, pe diagnostic routines which perform a self-test corresponds to the front panel indicator red Card Level Diagnostics (CLD) - provides asserts in the event of a card failure, and General Purpose Monitor signal on the P2 connector. This signal functions for the system integrator (refer to SBC provides a statusSVME/DMV-177The comprehensive monitoring and debug General Purpose Monitor (GPM) - provides ation about:rm for more info document number 804168 timers are cascadable. ware package. Refer tormfoundation fi interrupt output is provided, and three of SBC is supplied with aSVME/DMV-177The inal count. A programmablerminterrupt on te available to the user, providing a basic There are four additional 16-bit timers record and playback.intervals may be either 100 ms or 2 s. MAX-657 Single 1553B, Utility Bus and voice execution failure is detected. Watchdog Timer a fail indication or reset the CPU if an BC, RT and BM intervals. Hardware watchdog timers provide 1553A, and 1553B Notice 2. Modes include programmed to interrupt the CPU at regular two redundant 1553B interfaces. Support for MAX-654 Dual 1553B Controller, providesThere is an on-board tick timer which can be MAX-651 Single 1553B. currently in development include: base boards. MAXPacks that are available or maintain the time during loss of main power. with both air-cooled and conduction-cooled STDBY line, therefore it can continue to 4 ruggedization levels, for useall standard DY The RTC may be powered from the +5V module. MAXPack modules are available in interrupts to the CPU. can be enhanced by adding a MAXPack /wake-uprmcapable of periodic or ala SBCSVME/DMV-177The capabilities of the month are automatically updated. The RTC is interrupt controls. Leap-year and days per through to hundredths of seconds, and 1149.1. month, day, day-of-week, and seconds features and interface are compliant with IEEE day calculations. It contains registers for year, 603e development station. The JTAG Harris 7170 RTC chip to provide for time-of- work station tool such as the IBM RISCWatch is equipped with aSVME/DMV-177The be used mainly for chip/code debug using a board-level testing while the COP features will SVME/DMV-177 Built-in Test Other Single Board Computers from DY 4 · · SVME/DMV-162 · · SVME/DMV-163 Software · · SVME/DMV-166 · · SVME/DMV-176 · · · · Custom Variants · · · · · · · · MS00252 Revision C March 1997 DY 4 Systems Inc. Page 7 VxWorks Board Support Package FlashProg Flash EPROM programming utility P2 I/O cable for development system use Custom MAXPacks for User-defined I/O. Factory installation of MAXPack modules Depopulated SCSI and Ethernet Non-volatile memory of EEPROM or FLASH Mbytes Mbytes to 64DRAM capacity from 8 accessories include: options and177availability. SVME/DMV- your local sales representative for cost and our standard variants is not suitable. Contact Custom variants can be provided if the one of LynxOS VADSworks representative. VADSCross For more information call your local sales VxWorks Flash EEPROM operating systems include: RISC CPU, up to 12MB SRAM and 10MB . PlannedSVME/DMV-177available for the PowerPC 603eSBC with application programs, and software tools are 8MB SRAM and 8MB Flash EEPROM A variety of real-time operating systems, 68040 CPU up toSBC with 64MB DRAM and 4MB Flash EEPROM 68040 CPU up toSBC with and read later (such as at depot level). 8MB SRAM and 8MB Flash EEPROM notification, the DRT can be written to ROM 68040 CPU up toSBC with running. Given proper Power Down options. MAXPack interface while an application is RISC single board computers with a variety accessible via VMEbus, serial port, or via the DY 4 produces a full line of both CISC and Diagnostics Results Table (DRT), which is of armreserved for routine BIT storage in fo BIT in RAM. A small portion of RAM is provided, as well as the storage of results of and full-featured. A 95% confidence level is 300. 4's BIT is extensiveLevel Diagnostics, DY cards are available in levels 100, 200 and ware via CardrmIncorporated in Foundation Fi ruggedization levels 000 to 200. DMV-177 cards are available inSVME -177 SVME/DMV-177 Table 3 Specifications ENVIRONMENTAL SPECIFICATIONS Temperature (Level 0) 0° °C ° °C Temperature (Level 1) ° °C ° °C Temperature (Levels 2, 3) ° °C ° °C Humidity (DMV CCA and SVME CCA - Levels 1,3) Vibration (DMV) 2 Shock (DMV) Altitude (DMV L200) DIMENSIONS DMV CCA SVME CCA POWER REQUIREMENTS (Base card, fully populated) ° ° ° Page 8 DY 4 Systems Inc. MS00252 Revision C March 1997 SVME board operating temperature is based on air flow of 11 cfm. C marginally.component's junction temperature may exceed 110 C.) When reliability or performance factors permit, awall temperature is 85 C maximum (when the chassis cold-on the DMV-177-XXX is limited to 110 † As a general design objective, the junction temperature of all components 11 mA (typical)18 mA (maximum)-12v (+5%, -3.0%) 11 mA (typical)18 mA (maximum)+12v (+5%, -3.0%) tbd mA (typical)tbd mA (maximum)(standby)STDBY +5v tbd A (typical)tbd A (maximum)(operating)STDBY +5v 2 A(typical)4.5 A (maximum)+5v (+5%, -2.5%) <570g (<1.28 lb)<900g (<2 lb)Weight 20.0 mm (0.8 in.)20.0 mm (0.8 in.)Thickness 160 mm (6.3 in.)160 mm (6.3 in.)Depth 233.4 mm (9.2 in.)233.4 mm (9.2 in.)Height Method 500.3(100,000 ft) MIL-STD-81030,500m Method 516.4, Proc 1 MIL-STD-81040g/11ms half sine /Hz0.1gRandom Method 514.4 MIL-STD-81010g at 15 to 2,000 HzSine Method 507.30 to 100% condensingNon-Operating MIL-STD-8100 to 95% non-condensingOperating Methods 501.3 & 502.3C to 125-62Storage MIL-STD-810C to 85-55†Operating Methods 501.3 & 502.3C to 85-55Storage MIL-STD-810C to 71-40Operating Methods 501.3 & 502.3C to 85-40Storage MIL-STD-810C to 50Operating SVME/DMV-177 â ã DY 4 Systems Ltd. 98 Alexandria Pike Suite 32 Warrenton, VA 20186-2849 USA Virginia Tel: (540) 341-2101 Fax: (540) 341-2103 New Jersey Tel: (908) 362-5557 Fax: (908) 362-5821 California Tel: (909) 783-0240 Fax: (909) 783-4590 Texas Tel: (972) 680-5201 Fax: (972) 680-5203 DY 4 Asia Pacific Level 15, Corporate Centre One Cdr Bundall Rd & Slatyer Ave Gold Coast QLD 4217 Australia Tel: +61 7 5591 9546 Fax: +61 7 5591 9547 DY 4 Europe 15 Lambourne Crescent Cardiff Business Park Llanishen Cardiff, CF4 5GG Tel: +44 (0) 1222-747927 Fax: +44 (0) 1222 762060 DY 4 Canada 333 Palladium Dr. M/S 252 Kanata, Ontario Canada K2V 1A6 Tel: (613) 599-9191 Fax: (613) 599-7777 World-wide Internet Support Services Sales Support e-mail: sales@dy4.com Customer Support e-mail: support@dy4.com Customer Support Tel: (613) 599-9199 ext. 418 World-wide Web http://www.dy4.com MS00252 Revision C March 1997 DY 4 Systems Inc. Page 9 Printed in Canada, 1997 owners. All other products shown or mentioned are trademarks or registered trademarks of their respective is a registered trademark of DY 4 Systems Inc.BI-mode specification will be considered a superseding requirement. publication form a part of this specification to the extent referenced herein. In the event of a conflict, this References to other documents of the exact issue, or if not shown, the issue in effect at the time of assumes no responsibility for any errors that may appear in this document. commitment by DY 4 Systems Inc. While reasonable precautions have been taken, DY 4 Systems Inc. The information in this document is subject to change without notice and should not be construed as a