Innovating measurement technology™  ® Using WaferSense Auto Teaching System (ATS) on 200 mm and 300 mm TEL CLEAN TRACK ACT and Mark Tools Why Precision Calibration and Handoff Teaching is Critical on TEL CLEAN TRACK ACT and Mark Tools 1. Better resist uniformity 2. Recommended or required as part of routine PM’s 3. Required after robot, lift-pin, platen or other component replacements 4. Increased yield due to reduced particle generation with proper alignments and setups 5. Reduced scrap and wafer damage due to misalignments and mishandling 6. Required when system reports wafer placement errors 7. Necessary when troubleshooting unexplained problems such as excessive particles, unexpected tool noises, or unexplained abnormal Wafer placements must be exactly within 0.75 mm of each of 6 spacers – A difficult, imprecise, and time consuming procedure without ATS considering each chamber & Pinset combination must be independently taught 1 | Page CyberOptics Semiconductor WaferSense ATS on TEL Clean Track ACT and Mark Tools Legacy TEL CLEAN TRACK Position Teaching & Quick-check Methods CCD Wired CCD with cross-hair painted on lens on attached to a wafer with video & power wires running to a small 3” low resolution handheld portable TV. Manually placed into each chamber and/or Pinset chamber CCD Centering Tool Dummy Wafer Dummy wafer is ran though tool while tech listens for scraps and “where possible” watches for misalignments Centering Tool Consists of a centering pin that fits in the Chiller/heater center hole and a special wafer with a round indentation in the center where the wafer is placed on the pin. ® ® IIn nt tr ro od du uc ciin ng g W Wa af fe er rS Se en ns se e Automatic Teaching System (ATS) Teaches CLEAN TRACK Wafer Automatic Teaching System (ATS) Teaches CLEAN TRACK Wafer Hand-off Positions & Performs Quick-Checks Hand-off Positions & Performs Quick-Checks Wafer-like, wireless hardware Intuitive software Image of Target Feature acquired by ATS camera 2 | Page CyberOptics Semiconductor WaferSense ATS on TEL CLEAN TRACK ACT and Mark Tools ATS vs. Legacy Method Feature and Benefit Comparison Benefit  ATS  CCD  Centering Tool  1. Can be passed  YES: Passed through tool  NO:Device is thick (approx  NO: Requires tool dismantling  to each chamber  automatically without tool  28 mm), wired and  and hand placement of wafer  or teach location  dismantling or bringing off‐line  requires tool dismantling  and centering pin into each  automatically like  and hand placement into  chamber  a wafer  each chamber or Pinset  2. Objective and  YES: Precision calibrated to 100um  NO:No objective output  NO: Trial and error processing  accurate  accuracy and powerful vision  and users routinely report  where one tech operates  numerical   system locates pedestal center &  cross‐hair painted on CCD  robot and the other watches  “Answers Out”  displays Z, X & Z offsets with ultra‐ lens inaccurate.    until the wafer “appears” to  high 100um precision accuracy  be properly placed  3. Chambers and  YES: Discrete X, Y & Z offsets  NO:Tool must be  NO: Tool must be dismantle  Pinsets  easily  instantly calculated, one chamber  dismantle; power and  and wafer hand placed then  taught by one  typically taught in 3 minutes by  video cables routed, CCD  two techs, one at console and  tech  one tech without taking tool  hand placed and then two  one at chamber necessary to  offline  techs, one at console and  perform teaching by trial‐&‐ one at chamber required  error  4. Repeatable  YES:  ATS provides same identical  NO:Quality of results  NO: Quality of results  results  objective precision result  dependant on skill of tech  dependant on skill of tech  regardless of tech performing  performing procedure and  performing procedure and  procedure   limited by poor accuracy of  limited by poor accuracy of  device  device  5. Chambers  YES:   3‐5 minutes average per  NO:15 to 20 minutes per  NO: 15 to 20 minutes per  taught quickly  chamber with special maintenance  chamber‐ includes tool  chamber‐ includes tool  recipes    disassembly, running  disassembly,  hand‐placing  device wires, hand‐placing  wafer, trial‐&‐error wafer  CCD and tool re‐assembly  placements and tool re‐ assembly  6. Entire tool  YES:  Typically completed in 2  NO:Typically 8 to 12 hours  NO: Typically 8 to 12 hours  hand‐off teaching  hours or less with maintenance  depending on experience  depending on experience of  procedure   recipes to move ATS from  of Techs performing  Techs performing procedure  completed  chamber to chamber  procedure  quickly  7. Guaranteed  YES:  100um accuracy regardless of  NO:Accuracy limited by  NO: Accuracy limited by  accurate results   tech   technology and tech  technology and tech  experience  experience  8. Accurate  YES:  Typically completed in 15  NO:Quick‐checks not  NO: Quick‐checks not possible  Quick‐checks  minutes or less with 100um  possible with CCD  with centering wafer  possible  accuracy (using maintenance  recipes)   3 | Page CyberOptics Semiconductor WaferSense ATS on TEL CLEAN TRACK ACT and Mark Tools ATS Procedure for Tel Track 200 mm and 300 mm Module Position Teaching: 1. Power down tool and hookup teaching laptop 2. Power-up tool in Position Teaching mode 3. Place ATS in FI cassette 4. Select predefined ATS teach recipe for Pinset 1 5. To get ATS past load-port, place target wafer in cassette and pickup with FI robot, then before going into chamber, pause robot and swap with ATS before going into slit valve. 6. Follow TEL procedures for position teaching of all chambers. Teach Pinset 1 and Pinset 2 on all Hot-plates and Chill-plate spinners. Note: If using ATS to teach Spinner, DO NOT SPIN ATS. This risks damaging ATS and/or tool No need to open No need to open tool or hand-place tool or hand-place device with ATS device with ATS 4 | Page CyberOptics Semiconductor WaferSense ATS on TEL CLEAN TRACK ACT and Mark Tools Using ATS for Quick-checks: Background: • Dummy wafer is transferred though the tool by one tech while another tech listens for suspicious noises and when possible watches for wafer-misplacements. • NOT an effective or a repeatable method for identifying and correcting wafer placement issues. • Neither the CCD or Centering wafers are used for quick-checks since they must be “hand- placed” and consequently do not simulate actual wafer placements Quick-check Procedure with ATS 1. Place ATS load-port cassette and load into tool (see previous slide step 5 for instructions on getting ATS into tool). 2. Using a predefined ATS maintenance recipe which alternates Pinset 1, Pinset 2, send ATS into each chamber and check for wafer placement. 3. Using a predefined ATS maintenance recipe which alternates Pinset 2, Pinset 1, send ATS into each chamber and check for wafer placement 4. Using a predefined ATS maintenance recipe which checks Pinset 3 placement. 5. Typically 15 seconds per chamber and 10 minutes for the entire tool is all that is necessary with ATS Benefit Summary of Using ATS for CLEAN TRACK Handoff Teaching Event ATS Benefit Over Old Method Quick-checks • Quick-checks not possible with CCD or Centering wafer • ATS provides precision X, Y, and Z offsets accurate to 100um with-in 15 seconds Tool dismantling • Not necessary, ATS travels to all tool locations just like a wafer Manpower requirements • Only one tech needed with ATS. All TEL legacy methods require two techs Accessing difficult tool • ATS transferred via tool automation and goes all places that a wafer goes locations Time required to teach • Position teaching of entire tool completed in 2 hours or less compared to 6 entire tool to 12 hours with legacy Tool alignments and quick • High accuracy: Quick real-time hand-off teaching accurate to 100um handoff checks made with • Repeatable: Quick and easy teaching performed to same high standards ATS regardless of tech performing the procedure • Calibrations performed under ACTUAL closed chamber production conditions • Real-time feedback, no more trial and error • Discrete Go/No go and Data logging, standards can now be established Reassemble tool • No longer necessary to dismantle tool with ATS Restore production • No longer necessary to take off-line with ATS process 5 | Page CyberOptics Semiconductor WaferSense ATS on TEL CLEAN TRACK ACT and Mark Tools WaferSense® ATS Tel Track Use-Case Testimonial Interview with a TEL ACT, Mark Photo Department Manager and Active ATS User 1. What tasks are ATS used for on your TEL Mark and ACT tools? We use ATS for a number of tool maintenance tasks including routine PM’s, quick-checks, and troubleshooting mechanical or process yield related problems 2. How often is the WaferSense® ATS used for TEL Track setup, maintenance and quick-checks? Typically used once per month per tool for routine PM’s Due to the fact that the ATS makes it quite a bit easier to perform the checks plus provides “instant” results we use ATS several time per month “on the fly” to perform quick-checks. ATS is particularly useful for not only troubleshooting wafer placement related system alarms, but also correcting them in real-time without having to take the tool off-line 3. What is the time saving per TEL ACT or Mark Track tool taught using the WaferSense system vs. the old Legacy CCD or Centering Wafer Method? With ATS one tech can typically teach the average Track or Mark tool in about 2 hours compared to two techs in 8 to 12 hours using the CCD method. With the TEL CCD, every chamber had to be opened up, video and powers ran such that the did get tangled, then one tech needed to observe wafer movement while the other operated to the console laptop in teach mode. This is all very time consuming and no reliable. There have been a number of occasions where the power and video wires got hung-up in the tool and actually caused damage. With ATS, we just place the ATS in the tool, move it to each teach position, teach and the move on. 4. What quantifiable benefits have been observed using the ATS system as a result of the increased accuracy of the setups? Consistency is one of the biggest factors. We no longer have to depend on ability of individual techs to determining the accuracy and quality of the position teaching. All techs will achieve the same quick and accurate results Ease of use due to form factor allows for quick-checks and troubleshooting of issues which were previously never checked before because no adequate method existed to perform these checks 5. Have you observed other benefits such as reduced particles, reduced wafer damage, increased yield, or reduced tool down-time? If so, what types of specific quantifiable benefits have you had? Reduced down time would be greatest factor so far. Other less quantifiable benefits, but certainly and important benefit is fewer defects or problem passed down-line. For example, if resist uniformity is off due to poor wafer placement, this wafer could be passed on down the production line and the problem not identified until some later step. 6 | Page CyberOptics Semiconductor WaferSense ATS on TEL CLEAN TRACK ACT and Mark Tools