Technical Reference SB-P201 fi Single Pentium II/III Single Board Computer with Intel 440 BX Chipset 1641 McGaw Avenue Irvine, California 92614 P/N SB-P201-DOC Revision 1, January 1999 Features � 1 Pentiumfi II Processor upgradeable through 300, 350 MHz, 400 MHz and 450 MHz, with either 256 KB or 512 KB cache � Intel 440BX chipset � System memory, with 64-bit path, upgradeable from 8 MB to 512 MB fast page mode (FPM) or extended data out (EDO)/Hyper Page Mode RAM in two 168-pin DIMM sockets, one bank per socket � PCI local bus interface compliant with PCI 2.1 specification, 100 MB/sec bandwidth (sustained), supports 4 PCI bus masters, pipeline snoop ahead feature � AMI BIOS with BIOS-facilitated timers for Green PC feature � PS/2 keyboard, PS/2 mouse, 2 serial, 1 parallel and 2 USB ports � On-board PCI bus master EIDE controller (up to 4 EIDE drives & 2 floppy drives). Two channels support PIO modes 3 & 4; 14 MB/sec bus master IDE. � Year 2000 compliant TM � Compatible with Windows , NT, 95, 98, OS/2, SCO, TM TM TM Unix , Interactive UNIX , QNX SB-P201 iii FCC Standards The FCC (Federal Communications Commission) restricts the amount of radiation and radio frequency emissions coming from computing equipment. Note: This equipment has been tested and found to comply with the limits for a Class B digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates, uses, and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the use is encouraged to try to correct the interference by one or more of the following measures: � Reorient or relocate the receiving antenna. � Increase the separation between the equipment and receiver. � Connect the equipment into an outlet on a circuit different from that to which the receiver is connected. � Consult the dealer or an experienced radio/TV technician for help. CSS Labs is not responsible for any radio or television interference caused by unauthorized modifications to this equipment. Operation with non-certified peripherals is likely to result in interference to radio and TV reception. iv SB-P201 To ensure compliance to FCC noninterference regulations, peripherals attached to this device require shielded I/O cables. NOTICE: The use of a non-shielded I/O cable with this device is in violation of U.S. Federal law and will not allow the device to meet the maximum emission limits. CAUTION: Any changes or modifications not expressly approved by the grantee of this device could void the user�s authority to operate the equipment. Note: If you have purchased the miniature tower system, please note the following... Warning: The system is to be installed on desk or table tops only. The unit will become unstable if operated as a floor standing unit and unintentional force is applied to the top of the unit. Warning: Turn the unit off and unplug the power cord before you open the cover to install any cards or peripheral devices. SB-P201 v WARNING CAUTION: THERE IS A DANGER OF EXPLOSION IF THE BATTERY IS INCORRECTLY REPLACED. REPLACE ONLY WITH THE SAME OR EQUIVALENT TYPE RECOMMENDED BY THE MANUFACTURER. DISCARD USED BATTERIES ACCORDING TO THE MANUFACTURER�S INSTRUCTIONS. ATTENTION:IL Y A DANGER D�EXPLOSION S�IL Y A REMPLACEMENT INCORRECT DE LA BATTERRIE. REMPLACER UNIQUEMENT AVEC UNE BATTERI DU MEME TYPE OU D�UN TYPE RECOMMENDE PAR LE CONSTRUCTEUR. ETTERAU REBUT LES BATTERRIES USAGEES CONFORMEMANT AUX INSTRUCTIONS DU FABRICATANT. vi SB-P201 NOTICE The information within this manual is subject to change without notice. CSS Laboratories, Incorporated shall not be held liable for technical or editorial errors or omissions contained in herein; nor for incidental or consequential damages resulting from the furnishing, performance or use of this material. No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, mechanical, photocopying, recording or otherwise, without the prior written permission of CSS Laboratories, Inc. Product names mentioned herein are for identification purposes only, and may be trademarks and/or registered trademarks of their respective companies. ' 1999 CSS Laboratories, Inc. All rights reserved. P/N SB-P201-DOC Revision 1 January 1999 SB-P201 vii Table of Contents Overview ............................................................................... 1 The Microprocessor .............................................................. 2 The Board ............................................................................. 2 Cache Memory ............................................................... 2 Voltage Regulators.......................................................... 2 Connectors ............................................................................ 4 PS/2 Keyboard Connector J23 ...................................... 4 PS/2 Mouse Connector J24 ........................................... 4 Serial Ports 1 (COM1); Serial Port 2 (COM2) ................ Connectors J20, J21 ................................................. 5 Parallel Port J19 ............................................................ 5 Universal Serial Bus 0 (USB0); Universal Serial Bus 1 (USB1) Connectors J18, J17 .................................... 6 Primary EIDE (IDE-PRI); Secondary EIDE (IDE-SEC) J15, J16 ..................................................................... 6 Floppy Drive J22 ........................................................... 7 Fan Connectors J35, J36 ................................................ 7 CMOS Battery BT1 ...................................................... 8 Infrared Connector JP19 ............................................... 8 Jumpers ................................................................................. 9 Processor Speed Ratio JP29, JP30, JP31, JP32 .......... 10 Clear CMOS Contents JP17 ........................................11 System Memory .................................................................. 12 Installing and Removing DIMM................................... 12 System Memory Configuration .................................... 14 System Interrupts ................................................................ 15 Installing a Pentium II Processor ........................................ 16 Configuration Utilities ........................................................ 17 viii SB-P201 Overview ...................................................................... 17 Standard Setup ............................................................. 18 Advanced Setup ............................................................ 20 Advanced Chipset Setup ............................................... 22 Power Management Setup ............................................ 24 PCI/PnP Setup.............................................................. 25 Peripheral Setup ........................................................... 26 SB-P201 ix Overview This document describes the technical features of the board. The topics include: � The Microprocessor - description of the features of the Pentium II microprocessor � Board - illustration and description of the single board computer � Connectors - description of connector locations and functions on the board � Jumpers - detailed description of the jumpers used to configure the board � System Memory - detailed description of system memory and instructions on how to add memory � System Memory Map - listing of traditional address assignments for system memory � Configuration Utilities - description and instructions for using the utility to configure the board�s BIOS SBP201 1 The Microprocessor The Pentiumfi II microprocessor combines all of the features of the Pentium, Pentium Pro and 80486 processors plus Intel MMX� media enhancement technology, In addition, the Pentium II features: � Dynamic Execution performance � Multi-transaction system bus � Dual Independent Bus Architecture allowing access to data from either bus simultaneously or in parallel � Dynamic Execution with Multiple Branch Prediction, Data Flow Analysis and Speculative Execution � Intel MMX multimedia technology � 32K (16K/16K) non-blocking, level-one cache � 66 or 100 MHz bus speed � Error Correction Code (ECC), fault analysis, recovery, and functional redundancy checking for both system and L2 cache busses. The Board Cache Memory The processor comes with 32 KB of L1 cache, and 256 KB or 512 KB of internal L2 cache. Voltage Regulators The board comes with a voltage regulator, making the board compatible with the full line of processors. VR1 and VR2 are 1.5 volt regulators, VR3, VR4, VR5 and VR6 are 3.3 volt regulators and VR7 is a 2.5 volt regulator. 2 SBP201 FLASH SERIAL 1 SERIAL 2 JP29 J28 1 1 1 1 J19 J41 1 J17 JP24 1 1 JP19 J34 J32 1 J18 1 1 J43 1 1 J40 J22 JP17 1 BT1 1 40 40 J16 1 1 1 1 1 1 1 J124 J122 1 1 1 1 1 JP25 1 1 1 1 J123 J35 1 J36 1 J121 J126 1 J3 VR6 J5 J4 VR4 VR5 1 11 1 J42 VR7 1 1 1 VR3 JP1 JP3 JP5 VR2 Figure 1: The Board SBP201 3 PS/2 KYBD 2 PS/2 MOUSE JP28 JP2 JP4 JP16 J125 IDE-PRI J15 FLOPPY PARALLEL DIMM 2 DIMM 1 IDE-SEC JP11 J117 J116 J120 J115 J119 J118 R int l e JP26 JP27 R int l e Connectors Description Connector J23 PS/2 keyboard connector J24 PS/2 mouse connector J20 Serial port 1 connector J21 Serial port 2 connector J19 Parallel port J17 USB0 Universal Serial Bus 0 J18 USB1 Universal Serial Bus 1 J15 Primary IDE connector J16 Secondary IDE connector J22 Floppy drive connector J35, J36 Processor fan connectors JP19 Infrared connector BT1 Battery J34 Wake On LAN PS/2 Keyboard Connector J23 Pin Assignment Pin Assignment 1 Keyboard Data 4 +5 V 2 Not Used 5 Clock 3 Ground 6 Not Used PS/2 Mouse Connector J24 Pin Assignment Pin Assignment 1 Mouse Data 4 +5 V 2 Not Used 5 Clock 3 Ground 6 Not Used 4 SBP201 Serial Ports 1 (COM1); Serial Port 2 (COM2) Connectors J20, J21 The board provides two 9-pin serial ports and connectors. Pin Assignment Pin Assignment 1 DCD 6 DSR 2 RXD 7 RTS 3 TXD 8 CTS 4 DTR 9 RI 5 Ground Parallel Port J19 J19 provides the connection for the parallel port. Pin Assignment Pin Assignment 1 STE 14 Ground 2 AFD# 15 PD6 3 PD0 16 Ground 4 ERR# 17 PD7 5 PD1 18 Ground 6 INIT# 19 ACK# 7 PD2 20 Ground 8 SLIN# 21 BUSY 9 PD3 22 Ground 10 Ground 23 PE 11 PD4 24 Ground 12 Ground 25 SLCT 13 PD5 SBP201 5 Universal Serial Bus 0 (USB0); Universal Serial Bus 1 (USB1) Connectors J18, J17 The 6-pin Universal Serial Bus connectors are located on the board, behind serial port 1. Primary EIDE (IDE-PRI); Secondary EIDE (IDE-SEC) J15, J16 J15 is used for the primary PCI EIDE drive. J16 is used for the secondary on-board PCI EIDE. Pin Assignment Pin Assignment 1 Reset IDE 2 Ground 3 Host Data 7 4 Host Data 8 5 Host Data 6 6 Host Data 9 7 Host Data 5 8 Host Data 10 9 Host Data 4 10 Host Data 11 11 Host Data 3 12 Host Data 12 13 Host Data 2 14 Host Data 13 15 Host Data 1 16 Host Data 14 17 Host Data 0 18 Host Data 15 19 Ground 20 Key 21 DDRQ (DDRQ1) 22 Ground 23 I/O Write # 24 Ground 25 I/O Read# 26 Ground 27 IOCHRD 28 470 pulldown Ω 29 DDACK0(DDACK1)# 30 Ground 31 IRQ14 (IRQ15) 32 Reserved 33 Addr 1 34 Reserved 35 Addr0 36 Addr2 37 Chip Select 1P (1S)# 38 Chip select (3P 3S) 39 Activity # 40 Ground η 6 SBP201 Floppy Drive J22 J22 connects the floppy drive to the controller provided on the board. Pin Assignment Pin Assignment 1 Ground 2 DENSEL 3 Ground 4 TP 5 Key 6 FDENIN# 7 Ground 8 FDINDX# 9 Ground 10 FDM00# 11 Ground 12 FDDS01# 13 Ground 14 FDDS004# 15 Ground 16 FDM01# 17 MSEN1 18 FDDIR# 19 Ground 20 FDSTEP# 21 Ground 22 FDWD# 23 Ground 24 FDWE# 25 Ground 26 FDTRK0# 27 MSEN0 28 FDWPD# 29 Ground 30 FDRDATA# 31 Ground 32 FDRHEAD# 33 Ground 34 DSKCHG# Fan Connectors J35, J36 The processor fan provides extra cooling for the powerful new Pentium II processors. Pin Assignment 1 Ground 2 12 volt 3 Sense SBP201 7 CMOS Battery BT1 The board uses 3 volt lithium battery to maintain constant power to CMOS. The battery can last up to ten years before needing to be replaced. Infrared Connector JP19 JP19 connects to an optional infrared add-in controller. Infrared controllers can act as ports for a number of peripheral devices including mouse, printer and keyboard. Pin Assignment 1 Receiving 2 Transmitting 3 Ground 4 Not used 5 Not used 6 Vcc Wake On LAN J34 The Wake On LAN (WOL) will be supported in future revisions of the BIOS (under the Power Management Setup program). J34 is attached to the system�s LAN card and powers up the system when a wakeup packet or signal is received from the network through the card. Pin Assignment 1 Ground 2 12 volt 3 Sense 8 SBP201 Jumpers The board�s jumpers are pre-configured at the factory. Jumper Description JP25, JP26 Processor (core) bus frequency JP27, JP28 JP17 Clear CMOS contents Many of the system�s features are set by placing jumper caps on pins on the board. The board�s jumper settings are described in the following pages. Two-pin jumpers are described as either jumped, with the jumper cap �ON�, or not jumpered, with the jumper cap �OFF�. Jumpers with more than two pins are described with the pins to be jumped numerically. For example, if pins 1 and 2 are to be capped, the setting will be. �1-2�. Refer to the board illustration of page 3. SBP201 9 Processor Speed Ratio JP29, JP30, JP31, JP32 The Pentium II uses a clock multiplier to match the processor�s core frequency with the speed of the processor bus (the speed data travels into and out of the processor). These jumpers multiply the processor�s bus speed. Pentium II�s are available with 66 MHz or 100 MHz bus speeds. The following jumper table, the column labeled �Processor Speed Ratio� lists the number of times the board�s clock is multiplied to match the processor�s speed. Processor JP28 JP27 JP26 JP25 Speed Ratio 2x IN IN IN IN 3x IN IN OUT IN 4x IN IN IN OUT 5x IN IN OUT OUT 2.5x IN OUT IN IN 3.5x IN OUT OUT IN 4.5x IN OUT IN OUT The following table matches processor speed, processor clock and the board�s processor bus speed. Processor 66 MHz 100 MHz Speed Ratio 2x N/A 200 MHz 3x 200 MHz 300 MHz 4x 266 MHz 400 MHz 5x 333 MHz 500 MHz 2.5x 166 MHz N/A 3.5x 233 MHz 350 MHz 4.5x 300 MHz 450 MHz 10 SBP201 Clear CMOS Contents JP17 Temporarily placing a jumper shunt on JP17, pins 2-2 clears the contents of the CMOS chip. CMOS contains your system�s BIOS configuration. Remember to remove the jumper after you have cleared your CMOS� contents. Clear CMOS JP17 Clear CMOS 2-3 Normal (default) 1-2 Note: Leaving the jumper shut removed has the same effect as jumping pins 2-3. If pins 1-2 are not jumped, CMOS will be unable to retain it�s information. SBP201 11 System Memory The board uses DIMM memory. DIMM is available in 64-pin or 72-pin, where the 72-pin DIMM provides error correcting code (ECC). Up to 512 MB SDRAM is supported. 66 MHz FSB Processor Speed - use non-PC100 SDRAM 100 MHz FSB Processor Speed - use PC100 SDRAM Memory uses symmetrical and asymmetrical addressing. Single and double density DIMMS are supported There are two banks available for memory upgrades. The board supports DIMM in the following combinations: 1M x 64/72 = 8 MB/bank 8M x 64/72 = 64 MB/bank 2M x 64/72 = 16 MB/bank 16M x 64/72 = 128 MB/bank 4M x 64/72 = 32 MB/bank 32M x 64/72 = 256 MB/bank Installing and Removing DIMM Read these instructions completely before installing or removing DIMMs. The DIMM is held by plastic press-clips on both sides of the slot. Installing DIMM 1) Hold the DIMM so that the gold tab is pointing toward the slot. The DIMM is keyed so that it will only snap into the slot when positioned correctly. 2) Press one end of the DIMM until it inserts and its press- clip snaps into place. 3) Press the other end of the DIMM until it inserts and its press-clip snaps into place. 12 SBP201 Removing DIMM 1) Pull both press-clips simultaneously, until the DIMM pops up from its slot. The following pages provide a table with all the possible memory configurations for the SBP201. SBP201 13 System Memory Configuration RAM Bank 0 Bank 1 8 MB 1M x 64/72 16 MB 1M x 64/72 1M x 64/72 16 MB 2M x 64/72 24 MB 1M x 64/72 2M x 64/72 32 MB 2M x 64/72 2M x 64/72 32 MB 4M x 64/72 32 MB 2M x 64/72 2M x 64/72 40 MB 1M x 64/72 4M x 64/72 48 MB 2M x 64/72 4M x 64/72 48 MB 4M x 64/72 2M x 64/72 64 MB 8M x 64/72 64 MB 4M x 64/72 4M x 64/72 64 MB 4M x 64/72 4M x 64/72 72 MB 8M x 64/72 1M x 64/72 80 MB 2M x 64/72 8M x 64/72 96 MB 4M x 64/72 8M x 64/72 128 MB 8M x 64/72 8M x 64/72 128 MB 16M x 64/72 136 MB 16M x 64/72 1M x 64/72 144 MB 2M x 64/72 16M x 64/72 160 MB 16M x 64/72 4M x 64/72 192 MB 16M x 64/72 8M x 64/72 256 MB 16M x 64/72 16M x 64/72 256 MB 32M x 64/72 256 MB 16M x 64/72 16M x 64/72 264 MB 32M x 64/72 1M x 64/72 272 MB 32M x 64/72 2M x 64/72 288 MB 32M x 64/72 4M x 64/72 320 MB 32M x 64/72 8M x 64/72 384 MB 16M x 64/72 32M x 64/72 512 MB 32M x 64/72 32M x 64/72 14 SBP201 System Interrupts The processor has two controllers, supplying 16 IRQs. Below are assignments in decreasing priority. IRQ Function NMI Parity error IRQ0 Reserved, interval timer IRQ1 Reserved, keyboard buffer full IRQ2 Reserve, cascade interrupt from slave PIC IRQ3 Onboard serial port 2 IRQ4 Onboard serial port 1 IRQ5 User available IRQ6 Onboard floppy controller IRQ7 Onboard parallel port IRQ8 Real-time clock (RTC) IRQ9 User available IRQ10 User available IRQ11 User available IRQ12 Onboard mouse port if enabled, else user available IRQ13 Reserved, math coprocessor IRQ14 Onboard primary IDE disk controller IRQ15 Onboard secondary IDE disk controller Note: IRQ9, IRQ10, IRQ11, IRQ12, IRQ15, IRQ3, IRQ4, IRQ5 and IRQ7 can be redirected to PCI add-in boards. The PCI standard has a 4-IRQ limitation. Some PCI add-in boards do not require IRQs. Some can share an IRQ with another board of the same model and manufacture. Check the add-in board�s documentation for IRQ information. SBP201 15 Installing a Pentium II Processor The board provides a single edge contact (SEC) slot for Pentium II processor packaged in an SEC cartridge. The SEC slot is equipped with attach mount brackets and retention mechanism. The Pentium II mounts parallel with the single board computer. The heatsink is mounted on the board. The fan assembly is supplied with the Pentium II processor. Follow the directions below to install a Pentium II processor on the single board computer. Be sure to ground yourself during this procedure. 1. Remove the board�s DIMM memory modules. 2. Push the SEC cartridge�s two locks inward. With the fan facing outwards, press the cartridge gently but firmly until it is fully inserted into the slot. 3. To secure the SEC cartridge, push its locks outward so that the lock shows through the retention mechanism�s lock holes. 4. Plug the fan into the three-pin processor fan connector on the board. Lock Lock R int l pentium II e Figure 2: Pentium II, Top View 16 SBP201 Configuration Utilities Overview The BIOS Setup utility stores your system�s configuration. The utility described below provides a bridge to PCI slots in excess of the four allowed by current standards. When your system �boots�, it�s configuration is read into main memory. Hard drives, floppy drives, video adapter, memory and keyboard are described to the system. The BIOS is pre-configured at the factory. This document is an overview of the BIOS. To start the program, press the key while the system is booting. The Utilities menu screen will display: AMI HIFLEX SETUP UTILITY - VERSION 1.18 (c) 1996 American Megatrends, Inc. All Rights Reserved Standard CMOS Setup Advanced CMOS Setup Advanced Chipset Setup Power Management Setup PCI/Plug and Play Setup Peripheral Setup Auto Detect Hard Disk Change User Password Change Supervisor Password Change Language Setting Auto Configuration with Optional Settings Auto Configuration with Fail Safe Settings Save Settings and Exit Exit Without Saving Figure 3: The Main Menu SBP201 17 The most commonly accessed selections are Standard CMOS Setup, Advanced CMOS Setup, Advanced Chipset Setup, Power Management Setup PCI/Plug and Play Setup, and Peripheral Setup. Standard Setup This utility allows you to record your system setup. To start SETUP, Double-click on the Standard Setup icon on the Main Menu. Alter only the items that need to be changed or reset. If a selected option is correct, skip the corresponding step. AMI BIOS SETUP - STANDARD CMOS SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved Date (mm/dd/yy) : Friday, March 3, 1997Base Memory 640 KB Time (hh/mm/ss) : 11:11:00 Extd Memory : 15 MB Floppy Drive A : 1.44 MB 3 1/2 Floppy Drive B : Not Installed LBA Blk PIO 32bit Type Size Cyln Head WPcom Sec Mode Mode Mode Mode Pri Master Auto Pri Slave Auto Sec Master Auto Sec Slave Auto Boot Sector Virus Protection Disabled Month: Jan - Dec Esc: Exit : Sel Day : 01 - 31 PgUp/PgDn : Modify Year : 1901 - 2099 F2/F3 : Color Figure 4: Standard Setup Menu Pri Master Primary master IDE/PCI hard drive. Define the parameters of your hard disk and modes. The default setting is Auto, to auto-detect drive type. 18 SBP201 Pri Slave Primary slave IDE/PCI hard drive. Define the parameters of your hard disk and modes. The default setting is Auto, to auto-detect drive type. Sec Master Secondary master IDE/PCI hard drive, if installed. Define the parameters of your hard disk and modes. The default setting is Not Installed. Sec Slave Secondary slave IDE/PCI hard drive, if installed. Define the parameters of your hard disk and modes. The default setting is Not Installed. Note: You may also manually enter the hard disk parameters. Two helpful tables appear at the end of this section. One describes drive parameters, and the other is a list of various hard drive parameters. Floppy Drive A:/Floppy Drive B Select the type that matches the drive installed. Scroll through the fields using the up and down arrows. You may select from the following: 5.25� 3.5� 360 KB 720 KB 1.2 MB 1.44 MB 2.88 MB Date/Time Enter new values through the keyboard. Use the arrow keys to toggle between items. Available options for the highlighted item are displayed on the right side of the menu. Press or to toggle through available options. SBP201 19 Advanced Setup Advanced Setup allows you to fine tune some of the special features. These features are pre-set for you at the factory. Double-click the Advanced Setup icon on the Main Menu. Use the arrow keys to toggle between items. Available options for the highlighted item are displayed on the right side of the menu. Press or to toggle through available options. AMI BIOS SETUP - ADVANCED CMOS SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved Quick Boot Enabled Available Options: Pri Master ARMD Enabled Disabled Pri Slave ARMD Enabled Enabled Sec Master ARMD Enabled Sec Slave ARMD Enabled 1st Boot Device IDE-0 2nd Boot Device FLOPPY 3rd Boot Device CDROM Try Other Boot Devices Yes Initialize I20 Devices Yes Initial Display Mode BIOS Display Mode at Add-On ROM Init Force BIOS Floppy Access Control Read Write Hard Disk Access Control Read Write S.M.A.R.T. for Hard Disk Disable Boot Up NumLock On PS/2 Mouse Support Enabled Esc: Exit : Sel Primary Display VGA/EGA PgUp/PgDn : Modify Password Check Setup F2/F3 : Color Boot to OS/2 No Figure 5a: The Advanced Setup Menu 20 SBP201 AMI BIOS SETUP - ADVANCED CMOS SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved Initial Display Mode BIOS Available Options: Display Mode at Add-On ROM Init Force BIOS Disabled Floppy Access Control Read Write Enabled Hard Disk Access Control Read Write S.M.A.R.T. for Hard Disk Disable Boot Up NumLock On PS/2 Mouse Support Enabled Primary Display VGA/EGA Password Check Setup Boot to OS/2 No Cache Bus ECC Enabled System BIOS Cacheable Enabled C000, 16k Shadow Cached C400, 16k Shadow Cached C800, 16k Shadow Cached CC00, 16k Shadow Cached D000, 16k Shadow Cached D400, 16k Shadow Cached Esc: Exit : Sel D800, 16k Shadow Cached PgUp/PgDn : Modify DC00, 16k Shadow Cached F2/F3 : Color Figure 5b: The Advanced Setup Menu SBP201 21 Advanced Chipset Setup This option lets you configure some of the advanced features of your particular system through the chipset. It was pre- configured at the factory and need not be altered. Double- click on the Chipset Setup icon on the Main Menu. Use the arrow keys to toggle between items. Available options for the highlighted item are displayed on the right side of the menu. Press or to toggle through available options. AMI BIOS SETUP - ADVANCED CHIPSET SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved USB Function Disabled Available Options: USB KB/Mouse Legacy Support Disabled Disabled Port 64/60 Emulation Disabled Enabled SERR# Disabled PERR# Disabled USWC Write POST Enabled BX Master Latency TimerClks 64 Multi Trans Timer (Clks) 32 PCI1 to PCI0 Access Enabled DRAM Integrity Mode N/A DRAM Refresh Rate 15.6us Memory Hole Disabled SDRAM RAS# precharge Auto Power Down SDRAM Enabled ACPI Control Register Enabled Gated Clock Enabled Graphics aperture Size 64MB Esc: Exit : Sel Search for MDA Resources Yes PgUp/PgDn : Modify AGP Multi Trans Timer (AGP Clks) 32 F2/F3 : Color AGP Low-Priority Timer (AGP Clks) 16 Figure 6a: The Chipset Setup Menu 22 SBP201 AMI BIOS SETUP - ADVANCED CHIPSET SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved AGP Multi Trans Timer (AGP Clks) 32 Available Options: AGP Low-Priority Timer (AGP Clks) 16 Disabled AGP SERR Disabled Enabled AGP Parity Error Response Disabled 8bit I/O Recovery Time Disabled 16bit I/O Recovery Time Disabled PIIX4 SERR# Disabled USB Passive Release Enabled PIIX4 Passive Release Enabled PIIX4 Delayed Transaction Enabled TypeF DMA Buffer Controller1 Disabled TypeF DMA Buffer Controller2 Disabled DMA-0 Type Normal ISA DMA-1 Type Normal ISA DMA-2 Type Normal ISA DMA-3 Type Normal ISA DMA-4 Type Normal ISA Esc: Exit : Sel DMA-5 Type Normal ISA PgUp/PgDn : Modify DMA-6 Type Normal ISA F2/F3 : Color DMA-7 Type Normal ISA Figure 6b: The Chipset Setup Menu SBP201 23 Power Management Setup This utility lets you set the �green� functionality parameters. AMI BIOS SETUP - POWER MANAGEMENT SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved ACPI Aware O/S No Available Options: Power Mngmt/APM Disabled Disabled Power Button Function On/Off Enabled Green PC Monitor Power State Disabled Video Power Down Mode Suspend Hard Disk Power Down Mode Disabled Hard Disk Time Out (Minutes) Disabled Power Saving Type POS Standby/Suspend Timer Unit 4 min Standby Time Out Disabled Suspend Time Out Disabled Slow Clock Ratio 50%-62.5% Display Activity Ignore Device 6 (Serial port 1) Ignore Device 7 (Serial port 2) Ignore Device 8 (Parallel port) Ignore Device 5 (floppy disk) Ignore Esc: Exit : Sel Device 0 (Primary master IDE) Monitor PgUp/PgDn : Modify Device 1 (Primary slave IDE) Ignore F2/F3 : Color Device 2 (Secondary master IDE) Ignore Figure 7: The Advanced Setup Menu Instant On Timer is a green mode timer letting you wake the system up as it is triggered. IRQ3, 4, 5, 7, 9, 10, 11, 12, 13, 14, 15 can be ignored or monitored. Monitored, IRQ activity wakes up the system. Use the arrow keys to toggle between items. Available options for the highlighted item are displayed on the right side of the menu. Press or to toggle through available options. 24 SBP201 PCI/PnP Setup This menu allows you to define attributes of the PCI bus portion of the board. AMI BIOS SETUP - PLUG AND PLAY SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved Plug and Play O/S No Available Options: PCI Latency Timer (PCI Clocks) 64 Disabled PCI VGA Palette Snoop Disabled Enabled PCI IDE Bus Master Disabled OffBoard PCI IDE Card Auto OffBoard PCI IDE Primary IRQ Disabled OffBoard PCI IDE Secondary IRQ Disabled DMA Channel 0 PnP DMA Channel 1 PnP DMA Channel 3 PnP� DMA Channel 5 PnP DMA Channel 6 PnP DMA Channel 7 PnP IRQ3 PCI/PnP IRQ4 PCI/PnP IRQ5 PCI/PnP IRQ7 PCI/PnP IRQ9 PCI/PnP IRQ10 PCI/PnP IRQ11 PCI/PnP Esc: Exit : Sel IRQ15 PCI/PnP PgUp/PgDn : Modify Reserved Memory Size Disabled F2/F3 : Color Reserved Memory Address C8000 Figure 8: The PCI/Plug and Play Setup Menu Use the arrow keys to toggle between items. Available options for the highlighted item are displayed on the right side of the menu. Press or to toggle through available options. SBP201 25 Peripheral Setup This menu allows you to specify the peripherals installed on your board. On-board IDE enables the on-board chipset EIDE function. Use the arrow keys to toggle between items. Press to access the drop down selection menu. Use the arrow keys to toggle between options. Press to make a selection. AMI BIOS SETUP - PERIPHERALS SETUP (c) 1996 American Megatrends, Inc. All Rights Reserved OnBoard FDC Auto Available Options: OnBoard Serial Port A Auto Disabled OnBoard Serial Port B Auto Enabled Serial Port B Mode Normal IR Duplex Mode Half IrDA Protocol 1.6us OnBoard Parallel Port Auto Parallel Port Mode ECP EPP Version N/A Esc: Exit : Sel Parallel Port DMA Channel 3 PgUp/PgDn : Modify Parallel Port IRQ Auto F2/F3 : Color OnBoard IDE Both Figure 9: The Periperals Setup Menu 26 SBP201