ATMEL ATDH2224

Contents Atmel FPGA Integrated Development System (IDS) contains the following items: • IDS Installation Guide  CD-ROM containing all necessary software and online documents Features  Support for Industry-standard PC and Workstation Tools ®  Schematic, PLD, Verilog and VHDL Design Entry Supported  Macro Libraries for AT40K/AT40KAL and AT6000 FPGA Families Atmel FPGA  Automatic Macro Generators for AT40K and AT6000  HDL Planner for VHDL and Verilog Entry Integrated  Hierarchy Browser  User Library Management Development  Technology Mapping  Multi-chip Partitioning  Floor Planning Capability System (IDS)  Graphical Constraint Entry  Incremental Design Change  Timing Driven Design with Advanced Static Timing Analysis  Automatic Place and Route  Interactive Layout Editing  Power Calculation  Full Back-annotation for Functional and Post-layout Simulation  Online Tutorials for New and Advanced Users  Applications Support  FPGA Applications Hotline - (408) 436-4119 or fpga@atmel.com  FAQ and Application Notes at http://www.atmel.com/atmel/products/prod3.htm  Maintenance  Software Support for One Month is Included Description Atmel’s Integrated Development System (IDS) lets designers create fast, predictable designs with AT40K/AT40KAL and AT6000 Series FPGAs. ® ® ™ Available for use with Windows 98/2000, Windows NT and Sun Solaris /SunOS UNIX Workstation-based computers, IDS combines industry-standard software for design entry, synthesis and simulation with Atmel’s proprietary software for component generation, automatic and interactive placement and routing, timing analysis and bitstream generation. The IDS Desktop is shown in Figure 1. The Design Flow Bar provides push-button access to all the steps in the design flow. This includes opening schematic entry and synthesis tools and generating files for simulations automatically. Figure 2 shows the HDL Planner tool which is used for VHDL and Verilog Design Entry. Figure 3 shows the Macro Generator used to generate standard components with optimal layout and performance. Rev. 1421D–06/01 Figure 1. Integrated Development System Transcript Status Interactive Design Parts/Pinouts Hierarchy Bar Layout Editor Flow Bar Editor Browser Window 2 FPGA IDS FPGA IDS Figure 2. HDL Planner Tool Macro Generator Macro VHDL/Verilog Categories Components Editor 3 Figure 3. Macro Generator Batch Macro Generator Component Macro Generator Batch Size Capability Categories Options Components Indicator 4 FPGA IDS FPGA IDS Ordering IDS and CAE Tools System Requirements When IDS is shipped, the CD contains library support and interfaces to all the listed CAE tools, see on page 6. PC-based Systems ® A month evaluation copy of Exemplar LeonardoSpectrum For a single-user system, IDS requires a personal com- Synthesis tool is shipped on the CD. puter with a 80486 or greater micro-processor equipped as follows; or better. For other CAE tools listed, the libraries and interface are  3.5-inch 1.44 MB capacity high-density disk drive supplied on the IDS CD. For the vendor software and (recommended) licensing you should go directly to the third-party vendor. Atmel does not supply these systems. Many of the listed  CD-ROM drive tools have evaluation copies available on their web sites.  200 MB minimum hard drive (both IDS and Viewlogic)  48 MB extended memory minimum (64 MB recommended for larger designs using Timing and Simulation Libraries Mapping) ® A month evaluation copy of ModelSim Simulator is  Serial interface port shipped on the CD.  Parallel interface port There are many other simulators available on the world- wide web. The IDS CD does include fully verified Verilog  MS-DOS, release 5.0 ® and VHDL VITAL libraries. These can be compiled and  Microsoft Windows 95/98/2000, NT 3.51, or NT 4.0 or used with any other simulation tool that is Verilog or VHDL higher compliant. IDS will export a Functional Netlist for pre-layout  VGA graphics card and display monitor simulation and a Post-layout Netlist and SDF files for Post-  Windows compatible mouse layout Simulation.  A permanent swap space of 64 MB: refer to the Windows The only difference with “Unsupported” tools is that there documentation for details on its setup are not tutorials for these tools, and they are not fully inte- grated to IDS.  Sufficient disk space for file archival and management Sun-based Systems Annual Maintenance Agreements ® For a single-user system, IDS requires a Sun Sparcstation Annual maintenance agreements are available for each workstation equipped as follows: Package Option in the Integrated Development System  CD-ROM drive (local or network) (IDS). The first year of maintenance is included in the pur-  200 MB (minimum) hard drive 50 MB hard disk space chase price – renewal is optional. Maintenance allocated as swap space agreements give the users direct access to Atmel’s experi- enced technical support staff and cover software upgrades  64 MB RAM that keep engineers on the leading edge of Atmel’s design  SUNOS 4.1.2/Solaris 2.4 or higher tools.  X11R4/Motif 1.1.4, X11R5/Motif 1.2, or OpenWindows 3.x 5 CAE Tools Supported by IDS AT40K Software Maintenance Vendor Tool Version Type Platform AT40KAL AT6000 Ordering Code Ordering Code ™ ViewDraw 1.1+ Schematic PC x x ® eProduct Designer ™ Digital Fusion 1.1+ Simulation PC x x See Viewlogic See Viewlogic ™ ViewDraw 5.3.1 - 6.0+ Schematic Sun x x Table for Table for ® Ordering Ordering Viewlogic ™ ViewSim 5.3.1 - 6.0+ Simulation Sun x x ™ Powerview ™ ViewSynthesis 5.3.1 - 6.0+ Synthesis Sun x x ® ® Express /Capture 9.1+ Schematic PC x x ® ® ® Orcad Express /Capture 9.1+ Simulation PC x x ATDS2100PC ATDM2100PC ® ® Express /Capture 9.1+ Synthesis PC x x ® ™ Synplicity Synplify 5.1.2+ Synthesis PC/Sun x ATDS2100PC ATDM2100PC ™ ModelSim 4.7b+ Simulation PC x x ATDS2100PC ATDM2100PC ™ Model Technology ™ ModelSim 5.1+ Simulation Sun x x ATDS2100SN ATDM2100SN ™ LeonardoSpectrum 3+ Synthesis PC x x ATDS2100PC ATDM2100PC ™ ™ Exemplar Galileo Extreme 4.1+ Synthesis PC/Sun x x ATDS2100SN ATDM2100SN ™ Leonardo Extreme 4.1+ Synthesis PC/Sun x x ™ FPGA Express 2.1+ Synthesis PC x x ATDS2100PC ATDM2100PC ™ FPGA Compiler 3.2+ Synthesis Sun x x ® Synopsys ™ Design Compiler 3.2+ Synthesis Sun x x ATDS2100SN ATDM2100SN VSS VHDL 3.2+ Simulation Sun x x ™ Simulator AT6000 Only Software Maintenance Vendor Tool Version Type Platform AT6000 Ordering Code Ordering Code ™ Design Architect 8.2 - 8.4 Schematic Sun x ™ Quicksim 8.2 - 8.4 Simulation Sun x Mentor ™ ENWrite 8.2 - 8.4 Sun x ATDS2100SN ATDM2100SN Idea Station ™ ENRead 8.2 - 8.4 Sun x SG 8.2 - 8.4 Schematic Gen Sun x ™ Concept 1.6 - p4+ Schematic Sun x ™ Verilog-XL 2.3.14+ Simulation Sun x Cadence 9504 or ATDS2100SN ATDM2100SN Higher SDF Annotator 2.0.5 Sun x SDF Interface 5.0.5 Sun x 6 FPGA IDS FPGA IDS . Design Hardware ATDH40M AT40K Series FPGA Prototyping Kit (One Daughterboard included - Specify) ATDH40D84 Daughter Board Attachment - 84PLCC ATDH40D100R Daughter Board Attachment - 100RQFP ATDH40D100 Daughter Board Attachment - 100VQFP ATDH40D144 Daughter Board Attachment - 144TQFP ATDH40D160 Daughter Board Attachment - 160PQFP ATDH40D208 Daughter Board Attachment - 208PQFP ATDH40D240 Daughter Board Attachment - 240PQFP ATDH2000 AT6000 Series FPGA Demonstration Board ATDH2080 AT6000 Series FPGA Prototyping Kit ATDH2200E AT17 Series Configurator Programming Kit (Enhanced) ATDH2221 20-pin SOIC Adapter for ATDH2200 ATDH2222 20-pin PLCC Adapter for ATDH2200 ATDH2223 8-lead SOIC Adapter for ATDH2200 ATDH2224 44-lead TQFP Adapter for ATDH2200 ATDH2226 32-lead TQFP Adapter for ATDH2200 ATDH2227 44-lead PLCC Adapter for ATDH2200 ATDH2225 Standalone In-System Programming Cable 7 Atmel Headquarters Atmel Operations Corporate Headquarters Atmel Colorado Springs 2325 Orchard Parkway 1150 E. Cheyenne Mtn. Blvd. San Jose, CA 95131 Colorado Springs, CO 80906 TEL (408) 441-0311 TEL (719) 576-3300 FAX (408) 487-2600 FAX (719) 540-1759 Europe Atmel Rousset Atmel SarL Zone Industrielle Route des Arsenaux 41 13106 Rousset Cedex Casa Postale 80 France CH-1705 Fribourg TEL (33) 4-4253-6000 Switzerland FAX (33) 4-4253-6001 TEL (41) 26-426-5555 Atmel Smart Card ICs FAX (41) 26-426-5500 Scottish Enterprise Technology Park Asia East Kilbride, Scotland G75 0QR Atmel Asia, Ltd. TEL (44) 1355-357-000 Room 1219 FAX (44) 1355-242-743 Chinachem Golden Plaza Atmel Grenoble 77 Mody Road Tsimhatsui Avenue de Rochepleine East Kowloon BP 123 Hong Kong 38521 Saint-Egreve Cedex TEL (852) 2721-9778 France FAX (852) 2722-1369 TEL (33) 4-7658-3000 Japan FAX (33) 4-7658-3480 Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL (81) 3-3523-3551 FAX (81) 3-3523-7581 Atmel FPGA Hotline Fax-on-Demand e-mail 1-(408) 436-4119 North America: literature@atmel.com 1-(800) 292-8635 Atmel FPGA e-mail Web Site International: fpga@atmel.com http://www.atmel.com 1-(408) 441-0732 FAQ BBS Accessible on web site 1-(408) 436-4309 © Atmel Corporation 2001. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.. Design Architecht, QuickSim, ENWrite, ENRead, LeaonardoSpectrum and Exemplar are the trademarks of Mentor Graphics Corporation. Idea Station, Galileo and Leonardo are the registered trademarks of Mentor Graphics Corporation. Sparcstation is the registered trademark of Sun Microsystems, Inc. Solaris is the trademark of Sun Microsystems, Inc. ViewDraw is the registered trademark of Viewlogic Systems, Inc. eProduct Designer, Digital Fusion, ViewSim and ViewSynthesis are the trademarks of Viewlogic Sys- tems, Inc. Orcad, Orcad Express and Orcad Capture are the registered trademarks of Cadence Design Systems, Inc. FPGA Express, FPGA Compiler, Design Compiler and VSS VHDL Simulator are the trade- marks of Synopsys, Inc. Windows and Windows NT are trademarks of Microsoft Corporation. Sinplify is Printed on recycled paper. the registered trademark of Synplicity, Inc. ModelSim is the trademark of Model Technology Corporation. Verilog is the trademark of Gateway Design Automation Corporation. Vital is the registered trademark of 1421D–06/01/xM PureTech Waters of America, Inc. ® ™ All other marks bearing and/or are registered trademarks and trademarks of Atmel Corporation. Other terms and product names may be trademarks of others.