A1101, A1102, A1103, A1104, and A1106 Continuous-Time Switch Family Features and Benefits Description ® ▪ Continuous-time operation The Allegro A1101-A1104 and A1106 Hall-effect switches ▫ Fast power-on time are next generation replacements for the popular Allegro ▫ Low noise 312x and 314x lines of unipolar switches. The A110x family, ▪ Stable operation over full operating temperature range produced with BiCMOS technology, consists of devices that ▪ Reverse battery protection feature fast power-on time and low-noise operation. Device ▪ Solid-state reliability programming is performed after packaging, to ensure increased ▪ Factory-programmed at end-of-line for optimum switchpoint accuracy by eliminating offsets that can be induced performance by package stress. Unique Hall element geometries and low- ▪ Robust EMC performance offset amplifiers help to minimize noise and to reduce the ▪ High ESD rating residual offset voltage normally caused by device overmolding, ▪ Regulator stability without a bypass capacitor temperature excursions, and thermal stress. The A1101-A1104 and A1106 Hall-effect switches include the following on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS output transistor. The integrated voltage Packages: 3 pin SOT23W (suffix LH), and regulator permits operation from 3.8 to 24 V. The extensive 3 pin SIP (suffix UA) on-board protection circuitry makes possible a ±30 V absolute maximum voltage rating for superior protection in automotive and industrial motor commutation applications, without adding Continued on the next page… Not to scale Functional Block Diagram VCC Regulator To all subcircuits VOUT Amp Gain Offset Trim Control GND A1101-DS, Rev. 13 A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Description (continued) external components. All devices in the family are identical except provide magnetically optimized solutions for most applications. Package LH is an SOT23W, a miniature low-profile surface-mount for magnetic switchpoint levels. package, while package UA is a three-lead ultramini SIP for through- The small geometries of the BiCMOS process allow these devices hole mounting. Each package is lead (Pb) free, with 100% matte to be provided in ultrasmall packages. The package styles available tin plated leadframes. Selection Guide * Part Number Packing Mounting Ambient, T B (Min) B (Max) A RP OP A1101ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC A1101EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole 10 175 A1101LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC A1101LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1102ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC A1102EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole 60 245 A1102LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 150ºC A1102LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1103ELHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount –40ºC to 85ºC A1103LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount 150 355 –40ºC to 150ºC A1103LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1104EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole –40ºC to 85ºC A1104LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount 25 450 –40ºC to 150ºC A1104LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole A1106EUA-T Bulk, 500 pieces/bag 3-pin SIP through hole –40ºC to 85ºC A1106LLHLT-T 7-in. reel, 3000 pieces/reel 3-pin SOT23W surface mount 160 430 –40ºC to 150ºC A1106LUA-T Bulk, 500 pieces/bag 3-pin SIP through hole *Contact Allegro for additional packing options. Absolute Maximum Ratings Characteristic Symbol Notes Rating Units Supply Voltage V 30 V CC Reverse Supply Voltage V –30 V RCC Output Off Voltage V 30 V OUT Reverse Output Voltage V –0.5 V ROUT Output Current I 25 mA OUTSINK Magnetic Flux Density B Unlimited G Range E –40 to 85 ºC Operating Ambient Temperature T A Range L –40 to 150 ºC Maximum Junction Temperature T (max) 165 ºC J Storage Temperature T –65 to 170 ºC stg Allegro MicroSystems, Inc. 2 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 ELECTRICAL OPERATING CHARACTERISTICS over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units 1 Supply Voltage V Operating, T < 165°C 3.8 – 24 V CC J Output Leakage Current I V = 24 V, B < B –– 10 μA OUTOFF OUT RP Output On Voltage V I = 20 mA, B > B – 215 400 mV OUT(SAT) OUT OP Slew rate (dV /dt) < 2.5 V/μs, B > B + 5 G or CC OP 2 Power-On Time t ––4 μs PO B < B – 5 G RP 3 Output Rise Time t V = 12 V, R = 820 Ω, C = 12 pF – – 400 ns r CC LOAD S 3 Output Fall Time t V = 12 V, R = 820 Ω, C = 12 pF – – 400 ns f CC LOAD S I B > B – 4.1 7.5 mA CCON OP Supply Current I B < B – 3.8 7.5 mA CCOFF RP Reverse Battery Current I V = –30 V – – –10 mA RCC RCC Supply Zener Clamp Voltage V I = 10.5 mA; T = 25°C 32 – – V Z CC A 4 Supply Zener Current I V = 32 V; T = 25°C – – 10.5 mA Z Z A 1 Maximum voltage must be adjusted for power dissipation and junction temperature, see Power Derating section. 2 For V slew rates greater than 250 V/μs, and T = 150°C, the Power-On Time can reach its maximum value. CC A 3 C =oscilloscope probe capacitance. S 4 Maximum current limit is equal to the maximum I + 3 mA. CC(max) DEVICE QUALIFICATION PROGRAM Contact Allegro for information. EMC (Electromagnetic Compatibility) REQUIREMENTS Contact Allegro for information. Package LH Package UA, 3-pin SIP 3 2 1 3 1 2 Terminal List Number Name Description Package LH Package UA VCC Connects power supply to chip 1 1 VOUT Output from circuit 2 3 GND Ground 3 2 Allegro MicroSystems, Inc. 3 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com VCC GND VOUT VCC GND VOUT A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 1 MAGNETIC OPERATING CHARACTERISTICS over full operating voltage and ambient temperature ranges, unless otherwise noted Characteristic Symbol Test Conditions Min. Typ. Max. Units T = 25°C 50 100 160 G A A1101 Operating Temperature Range 30 100 175 G T = 25°C 130 180 230 G A A1102 Operating Temperature Range 115 180 245 G T = 25°C 220 280 340 G A Operate Point B A1103 OP Operating Temperature Range 205 280 355 G T = 25°C 70 – 350 G A A1104 Operating Temperature Range 35 – 450 G T = 25°C 280 340 400 G A A1106 Operating Temperature Range 260 340 430 G T = 25°C 10 45 130 G A A1101 Operating Temperature Range 10 45 145 G T = 25°C 75 125 175 G A A1102 Operating Temperature Range 60 125 190 G T = 25°C 165 225 285 G A Release Point B A1103 RP Operating Temperature Range 150 225 300 G T = 25°C 50 – 330 G A A1104 Operating Temperature Range 25 – 430 G T = 25°C 180 240 300 G A A1106 Operating Temperature Range 160 240 330 G T = 25°C 20 55 80 G A A1101 Operating Temperature Range 20 55 80 G T = 25°C 30 55 80 G A A1102 Operating Temperature Range 30 55 80 G T = 25°C 30 55 80 G A Hysteresis B A1103 HYS Operating Temperature Range 30 55 80 G T = 25°C 20 55 – G A A1104 Operating Temperature Range 20 55 – G T = 25°C 70 105 140 G A A1106 Operating Temperature Range 70 105 140 G 1 Magnetic flux density, B, is indicated as a negative value for north-polarity magnetic fields, and as a positive value for south-polarity magnetic fields. This so-called algebraic convention supports arithmetic comparison of north and south polarity values, where the relative strength of the field is indicated by the absolute value of B, and the sign indicates the polarity of the field (for example, a –100 G field and a 100 G field have equivalent strength, but opposite polarity). Allegro MicroSystems, Inc. 4 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Package LH, 2-layer PCB (R = 110 ºC/W) QJA Package UA, 1-layer PCB (R = 165 ºC/W) QJA Package LH, 1-layer PCB (R = 228 ºC/W) QJA A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Characteristic Symbol Test Conditions Value Units Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W 2 Package LH, 2-layer PCB with 0.463 in. of copper area each Package Thermal Resistance R 110 ºC/W θJA side connected by thermal vias Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W Power Derating Curve T = 165ºC; I = I J(max) CC CC(max) 25 24 V CC(max) 23 22 21 20 19 18 17 16 15 14 13 Package LH, 2-layer PCB 12 (R = 110 ºC/W) 11 QJA 10 Package UA, 1-layer PCB 9 8 (R = 165 ºC/W) QJA 7 Package LH, 1-layer PCB 6 (R = 228 ºC/W) 5 QJA 4 V CC(min) 3 2 20 40 60 80 100 120 140 160 180 Power Dissipation versus Ambient Temperature 1900 1800 1700 1600 1500 1400 1300 1200 1100 1000 900 800 700 600 500 400 300 200 100 0 20 40 60 80 100 120 140 160 180 Temperature (°C) Allegro MicroSystems, Inc. 5 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com Power Dissipation, P (mW) D Maximum Allowable V (V) CC A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Characteristic Data Supply Current (On) versus Ambient Temperature Supply Current (On) versus Supply Voltage (A1101/02/03/04/06) (A1101/02/03/04/06) 8.0 8.0 7.0 7.0 6.0 6.0 T (°C) A V (V) CC 5.0 5.0 –40 24 4.0 25 4.0 3.8 150 3.0 3.0 2.0 2.0 1.0 1.0 0 0 –50 0 50 100 150 0 5 10 15 20 25 T (°C) A V (V) CC Supply Current (Off) versus Ambient Temperature Supply Current (Off) versus Supply Voltage (A1101/02/03/04/06) (A1101/02/03/04/06) 8.0 8.0 7.0 7.0 6.0 6.0 T (°C) A V (V) CC 5.0 5.0 –40 24 25 4.0 4.0 3.8 150 3.0 3.0 2.0 2.0 1.0 1.0 0 0 0 5 10 15 20 25 –50 0 50 100 150 T (°C) A V (V) CC Output Voltage (On) versus Ambient Temperature Output Voltage (On) versus Supply Voltage (A1101/02/03/04/06) (A1101/02/03/04/06) 400 400 350 350 300 300 T (°C) 250 V (V) A CC 250 –40 24 200 200 25 3.8 150 150 150 100 100 50 50 0 0 –50 0 50 100 150 0 5 10 15 20 25 T (°C) V (V) A CC Allegro MicroSystems, Inc. 6 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com V (mV) I (mA) I (mA) CCOFF CCON OUT(SAT) V (mV) I (mA) I (mA) OUT(SAT) CCOFF CCON Switch to Low B OP A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Functional Description OPERATION packaging to tighten magnetic parameter distributions. In con- The output of these devices switches low (turns on) when a trast, chopper-stabilized switches employ an offset cancellation magnetic field (south polarity) perpendicular to the Hall ele- technique on the chip that eliminates these offsets without the ment exceeds the operate point threshold, B . After turn-on, OP need for after-packaging programming. The tradeoff is a longer the output is capable of sinking 25 mA and the output voltage is settling time and reduced frequency response as a result of the V . When the magnetic field is reduced below the release OUT(SAT) chopper-stabilization offset cancellation algorithm. point, B , the device output goes high (turns off). The differ- RP ence in the magnetic operate and release points is the hysteresis, The choice between continuous-time and chopper-stabilized B , of the device. This built-in hysteresis allows clean switch- hys designs is solely determined by the application. Battery manage- ing of the output, even in the presence of external mechanical ment is an example where continuous-time is often required. In vibration and electrical noise. these applications, V is chopped with a very small duty cycle CC in order to conserve power (refer to figure 2). The duty cycle Powering-on the device in the hysteresis region, less than B and OP is controlled by the power-on time, t , of the device. Because higher than B , allows an indeterminate output state. The correct PO RP continuous-time devices have the shorter power-on time, they state is attained after the first excursion beyond B or B . OP RP are the clear choice for such applications. CONTINUOUS-TIME BENEFITS For more information on the chopper stabilization technique, Continuous-time devices, such as the A110x family, offer the refer to Technical Paper STP 97-10, Monolithic Magnetic Hall fastest available power-on settling time and frequency response. Sensing Using Dynamic Quadrature Offset Cancellation and Due to offsets generated during the IC packaging process, Technical Paper STP 99-1, Chopper-Stabilized Amplifiers with a continuous-time devices typically require programming after Track-and-Hold Signal Demodulator. (A) (B) V S V+ V CC VCC R L Output A110x VOUT GND V OUT(SAT) 0 B+ B– 0 B HYS Figure 1. Switching Behavior of Unipolar Switches. On the horizontal axis, the B+ direction indicates increasing south polarity magnetic field strength, and the B– direction indicates decreasing south polarity field strength (including the case of increasing north polarity). This behavior can be exhibited when using a circuit such as that shown in Panel B. Allegro MicroSystems, Inc. 7 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com V OUT Switch to High B RP A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 ADDITIONAL APPLICATIONS INFORMATION Extensive applications information for Hall-effect devices is available in: • Hall-Effect IC Applications Guide, Application Note 27701 • Hall-Effect Devices: Gluing, Potting, Encapsulating, Lead Welding and Lead Forming, Application Note 27703.1 • Soldering Methods for Allegro’s Products – SMT and Through- Hole, Application Note 26009 All are provided in Allegro Electronic Data Book, AMS-702, and the Allegro Web site, www.allegromicro.com. 1 2 3 4 5 V CC t V OUT t Output Sampled t PO(max) Figure 2. Continuous-Time Application, B < B .. This figure illustrates the use of a quick cycle for chopping V in order to conserve battery power. RP CC Position 1, power is applied to the device. Position 2, the output assumes the correct state at a time prior to the maximum Power-On Time, t . PO(max) The case shown is where the correct output state is HIGH. Position 3, t has elapsed. The device output is valid. Position 4, after the output is PO(max) valid, a control unit reads the output. Position 5, power is removed from the device. Allegro MicroSystems, Inc. 8 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Power Derating Power Derating Example: Reliability for V at T =150°C, package UA, using The device must be operated below the maximum junction CC A minimum-K PCB. temperature of the device, T . Under certain combinations of J(max) peak conditions, reliable operation may require derating sup- Observe the worst-case ratings for the device, specifically: plied power or improving the heat dissipation properties of the R =165°C/W, T =165°C, V = 24 V, and JA J(max) CC(max) application. This section presents a procedure for correlating I = 7.5 mA. CC(max) factors affecting operating T . (Thermal data is also available on J Calculate the maximum allowable power level, P . First, the Allegro MicroSystems Web site.) D(max) invert equation 3: The Package Thermal Resistance, R , is a figure of merit sum- JA T = T – T = 165°C–150°C = 15°C marizing the ability of the application and the device to dissipate max J(max) A heat from the junction (die), through all paths to the ambient air. This provides the allowable increase to T resulting from internal J Its primary component is the Effective Thermal Conductivity, power dissipation. Then, invert equation 2: K, of the printed circuit board, including adjacent devices and traces. Radiation from the die through the device case, R , is JC P = T ÷ R = 15°C ÷ 165 °C/W = 91 mW D(max) max JA relatively small component of R . Ambient air temperature, JA T , and air motion are significant external factors, damped by Finally, invert equation 1 with respect to voltage: A overmolding. V = P ÷ I = 91 mW ÷ 7.5 mA = 12.1 V CC(est) D(max) CC(max) The effect of varying power levels (Power Dissipation, P ), can D The result indicates that, at T , the application and device can A be estimated. The following formulas represent the fundamental dissipate adequate amounts of heat at voltages ≤V . CC(est) relationships used to estimate T , at P . J D Compare V to V . If V ≤ V , then reli- CC(est) CC(max) CC(est) CC(max) P = V I (1) × D IN IN able operation between V and V requires enhanced CC(est) CC(max) R . If V ≥ V , then operation between V and JA CC(est) CC(max) CC(est)  T = P R (2) V is reliable under these conditions. × D JA CC(max) T = T + ΔT (3) J A For example, given common conditions such as: T = 25°C, A V = 12 V, I = 4 mA, and R = 140 °C/W, then: CC CC JA P = V I = 12 V 4 mA = 48 mW × × D CC CC T = P R = 48 mW 140 °C/W = 7°C × × D JA T = T + T = 25°C + 7°C = 32°C J A A worst-case estimate, P , represents the maximum allow- D(max) able power level (V , I ), without exceeding T , CC(max) CC(max) J(max) at a selected R and T . JA A Allegro MicroSystems, Inc. 9 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Package LH, 3-Pin (SOT-23W) +0.12 2.98 –0.08 D 1.49 4°±4° 3 A +0.020 0.180 –0.053 0.96 D +0.10 +0.19 2.40 2.90 1.91 –0.20 –0.06 0.70 D 0.25 MIN 1.00 1 2 0.55 REF 0.25 BSC 0.95 Seating Plane Gauge Plane B PCB Layout Reference View Branded Face 8X 10° REF C Standard Branding Reference View 1.00 ±0.13 A1101, A1102, +0.10 A1103, A1104, 0.05 NNT –0.05 and A1106 0.95 BSC 0.40 ±0.10 1 For Reference Only; not for tooling use (reference dwg. 802840) N = Last two digits of device part number Dimensions in millimeters T = Temperature code (letter) Dimensions exclusive of mold flash, gate burrs, and dambar protrusions Exact case and lead configuration at supplier discretion within limits shown A Active Area Depth, 0.28 mm REF A1101, A1102, B Reference land pattern layout NNN A1103, and All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary A1104 only to meet application process requirements and PCB layout tolerances C Branding scale and appearance at supplier discretion 1 D Hall element, not to scale N = Last three digits of device part number Allegro MicroSystems, Inc. 10 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Package UA, 3-Pin SIP +0.08 4.09 –0.05 45° B C E 2.04 1.52 ±0.05 1.44 E Mold Ejector +0.08 Pin Indent 3.02 NNT –0.05 E 45° Branded Face 1 2.16 D Standard Branding Reference View MAX = Supplier emblem 0.79 REF N = Last two digits of device part number T = Temperature code A 0.51 REF 1 23 For Reference Only; not for tooling use (reference DWG-9049) Dimensions in millimeters Dimensions exclusive of mold flash, gate burrs, and dambar protrusions +0.03 Exact case and lead configuration at supplier discretion within limits shown 0.41 –0.06 15.75 ±0.51 A Dambar removal protrusion (6X) B Gate burr area C Active Area Depth, 0.50 mm REF D Branding scale and appearance at supplier discretion E Hall element, not to scale +0.05 1.27 NOM 0.43 –0.07 Allegro MicroSystems, Inc. 11 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com A1101, A1102, A1103, Continuous-Time Switch Family A1104, and A1106 Revision History Revision Revision Date Description of Revision Rev. 13 May 24, 2012 Update LH package branding Copyright ©2006-2012, Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the information being relied upon is current. Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. For the latest version of this document, visit our website: www.allegromicro.com Allegro MicroSystems, Inc. 12 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com