ACTEL CoreAHB2APB

Description
Actel CoreAHB2APB AHB slave; connects AHB to APB
Part Number
CoreAHB2APB
Price
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Manufacturer
ACTEL
Lead Time
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Category
PRODUCTS - C
Features
- Allows Easy Connection of APB Devices to a CoreMP7 or Cortex-M1 Subsystem
- Allows easy connection of APB Devices to a processor subsystem
- Auto Stitch in CoreConsole for Rapid Development
- Auto-stitched to AHB and APB slave devices using SmartDesign IP design tool in Libero IDE
- Bridges between Advanced Microcontroller Bus Architecture (AMBA) Advanced High-Performance Bus (AHB)and Advanced Peripheral Bus (APB)
- Compatible with AMBA, CoreMP7, and Cortex-M1
- Fully compatible with Cortex-M1, CoreMP7 and AMBA IP cores
- See the datasheet for device utilization
- Up to 16 APB Slave Devices Supported
Datasheet
Extracted Text
CoreAHB2APB Key Features Contents • Supplied in SysBASIC Core Bundle Bridges between Advanced Microcontroller Bus General Description ................................................... 1 Architecture (AMBA) Advanced High-Performance Connecting CoreAHB2APB in CoreConsole .............. 2 Bus (AHB) and Advanced Peripheral Bus (APB) Resource Requirements ............................................. 2 Up to 16 APB Slave Devices Supported Ordering Information ................................................ 2 Automatic Connection to CoreAHB and CoreAPB List of Changes ........................................................... 3 in CoreConsole Datasheet Categories ................................................. 3 Benefits Allows Easy Connection of APB Devices to a CoreMP7 or Cortex-M1 Subsystem General Description Auto Stitch in CoreConsole for Rapid Development Compatible with AMBA, CoreMP7, and Cortex-M1 CoreAHB2APB (AMBA Bridge) is an AHB slave that links the AHB bus to the APB bus and acts as the Master on the APB bus. Address decoding for the APB bus is carried Supported Device Families out within CoreAHB2APB, and this provides select signals Fusion for up to 16 APB slave slots. IGLOO™ Read and write transfers on the AHB bus are converted IGLOOe to corresponding transfers on the APB bus. High- ® ProASIC 3L bandwidth peripherals, such as memory controllers, are typically connected to the AHB, whereas the APB bus is ProASIC3 used for less demanding peripherals, such as watchdogs. ProASIC3E Unlike the AHB bus, transfers on the APB bus are not pipelined. Synthesis and Simulation Support ® Supported in the Actel Libero Integrated Design Environment (IDE) Verification and Compliance Compliant with AMBA January 2008 v2.1 1 © 2008 Actel Corporation CoreAHB2APB Figure 1 shows the CoreAHB2APB block diagram. APB Output Data Bridge and Address Module Bus Drivers State Standard AHB Machine AHB Slave Slave Interface Output Drivers APB Address APB Decoder Output Drivers Figure 1 • CoreAHB2APB Connecting CoreAHB2APB in CoreConsole Table 1 lists the ports present on the AMBA Bridge and describes how to connect these in CoreConsole. Table 1 AMBA Bridge Connections Connection CoreConsole Label Description Required Connections AHB slave interface AHBslave Connect this to any of the 16 available slave slots on the AHB bus (CoreAHB). APB master interface APBmaster Connect this to the APBmaster interface on the APB bus (CoreAPB). HCLK HCLK AHB system clock input. Connect this to the HCLK output of CoreMP7Bridge. HRESETn HRESEETn Active-low AHB system reset. Connect this to the HCLK output of CoreMP7Bridge. Resource Requirements The utilization for CoreAHB2APB in a ProASIC3 device is 250 tiles. Ordering Information CoreAHB2APB is included in the SysBASIC core bundle supplied with the Actel CoreConsole IP Deployment Platform (IDP). The obfuscated RTL version of SysBASIC (SysBASIC-OC) is available for free with CoreConsole. The source RTL version of SysBASIC (SysBASIC-RM) can be ordered through your local Actel sales representative. CoreAHB2APB cannot be ordered separately from the SysBASIC core bundle. 2 v2.1 CoreAHB2APB List of Changes The following table lists critical changes that were made in the current version of the document. Previous Version Changes in Current Version (v2.1) Page v2.0 The "Supported Device Families" section was updated to include ProASIC3L. 1 The "Resource Requirements" section was updated to change ProASIC3E to ProASIC3. 2 Advanced v0.1 The "Benefits" section was updated to include Cortex-M1. 1 The "Supported Device Families" section was updated to include IGLOO and IGLOOe devices. 1 Datasheet Categories In order to provide the latest information to designers, some datasheets are published before data has been fully characterized. Datasheets are designated as "Product Brief," "Advanced," and "Production." The definitions of these categories are as follows: Product Brief The product brief is a summarized version of an advanced or production datasheet containing general product information. This brief summarizes specific device and family information for unreleased products. Advanced This datasheet version contains initial estimated information based on simulation, other products, devices, or speed grades. This information can be used as estimates, but not for production. Unmarked (production) This datasheet version contains information that is considered to be final. v2.1 3 Actel and the Actel logo are registered trademarks of Actel Corporation. All other trademarks are the property of their owners. www.actel.com Actel Corporation Actel Europe Ltd. Actel Japan Actel Hong Kong 2061 Stierlin Court River Court, Meadows Business Park EXOS Ebisu Building 4F Room 2107, China Resources Building Mountain View, CA Station Approach, Blackwater 1-24-14 Ebisu Shibuya-ku 26 Harbour Road 94043-4655 USA Camberley Surrey GU17 9AB Tokyo 150 Japan Wanchai, Hong Kong United Kingdom Phone 650.318.4200 Phone +81.03.3445.7671 Phone +852 2185 6460 Fax 650.318.4600 Phone +44 (0) 1276 609 300 Fax +81.03.3445.7668 Fax +852 2185 6488 Fax +44 (0) 1276 607 540 www.jp.actel.com www.actel.com.cn 51700074-2/1.08
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